diff --git a/src/frontend/A32/decoder/asimd.inc b/src/frontend/A32/decoder/asimd.inc
index 595a3a2d..42254b37 100644
--- a/src/frontend/A32/decoder/asimd.inc
+++ b/src/frontend/A32/decoder/asimd.inc
@@ -53,7 +53,6 @@ INST(asimd_VRECPS,          "VRECPS",                   "111100100D0znnnndddd111
 INST(asimd_VRSQRTS,         "VRSQRTS",                  "111100100D1znnnndddd1111NQM1mmmm") // ASIMD
 
 // Two registers and a scalar
-INST(arm_UDF,               "UNALLOCATED",              "1111001-1-11-------------1-0----") // ASIMD
 INST(asimd_VMLA_scalar,     "VMLA (scalar)",            "1111001Q1Dzznnnndddd0o0FN1M0mmmm") // ASIMD
 INST(asimd_VMLAL_scalar,    "VMLAL (scalar)",           "1111001U1dzznnnndddd0o10N1M0mmmm") // ASIMD
 //INST(asimd_VQDMLAL,         "VQDMLAL/VQDMLSL",          "111100101-BB--------0x11-1-0----") // ASIMD
diff --git a/src/frontend/A32/translate/impl/asimd_two_regs_scalar.cpp b/src/frontend/A32/translate/impl/asimd_two_regs_scalar.cpp
index 1939be1e..f460c3c7 100644
--- a/src/frontend/A32/translate/impl/asimd_two_regs_scalar.cpp
+++ b/src/frontend/A32/translate/impl/asimd_two_regs_scalar.cpp
@@ -26,7 +26,11 @@ enum class MultiplyBehavior {
 
 bool ScalarMultiply(ArmTranslatorVisitor& v, bool Q, bool D, size_t sz, size_t Vn, size_t Vd, bool F, bool N, bool M, size_t Vm,
                     MultiplyBehavior multiply) {
-    ASSERT_MSG(sz != 0b11, "Decode error");
+    if (sz == 0b11) {
+        // TODO: This should be a decode error.
+        return v.UndefinedInstruction();
+    }
+
     if (sz == 0b00 || (F && sz == 0b01)) {
         return v.UndefinedInstruction();
     }
@@ -65,7 +69,11 @@ bool ScalarMultiply(ArmTranslatorVisitor& v, bool Q, bool D, size_t sz, size_t V
 }
 
 bool ScalarMultiplyLong(ArmTranslatorVisitor& v, bool U, bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool M, size_t Vm, MultiplyBehavior multiply) {
-    ASSERT_MSG(sz != 0b11, "Decode error");
+    if (sz == 0b11) {
+        // TODO: This should be a decode error.
+        return v.UndefinedInstruction();
+    }
+
     if (sz == 0b00 || Common::Bit<0>(Vd)) {
         return v.UndefinedInstruction();
     }