From 2d3c8c5724800534f68e801e3f18b13a4d400e22 Mon Sep 17 00:00:00 2001
From: Merry <git@mary.rs>
Date: Wed, 30 Nov 2022 00:30:33 +0000
Subject: [PATCH] emit_arm64_data_processing: Deal with pseudo-op use issue

See #728
---
 .../backend/arm64/emit_arm64_data_processing.cpp         | 9 ++++-----
 src/dynarmic/backend/arm64/reg_alloc.cpp                 | 3 ++-
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp b/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
index d582700f..f0250361 100644
--- a/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
+++ b/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
@@ -269,8 +269,8 @@ void EmitIR<IR::Opcode::LogicalShiftLeft32>(oaknut::CodeGenerator& code, EmitCon
         }
     } else {
         if (shift_arg.IsImmediate() && shift_arg.GetImmediateU8() == 0) {
-            ctx.reg_alloc.DefineAsExisting(inst, operand_arg);
             ctx.reg_alloc.DefineAsExisting(carry_inst, carry_arg);
+            ctx.reg_alloc.DefineAsExisting(inst, operand_arg);
         } else if (shift_arg.IsImmediate()) {
             // TODO: Use RMIF
             const u8 shift = shift_arg.GetImmediateU8();
@@ -406,8 +406,8 @@ void EmitIR<IR::Opcode::LogicalShiftRight32>(oaknut::CodeGenerator& code, EmitCo
         }
     } else {
         if (shift_arg.IsImmediate() && shift_arg.GetImmediateU8() == 0) {
-            ctx.reg_alloc.DefineAsExisting(inst, operand_arg);
             ctx.reg_alloc.DefineAsExisting(carry_inst, carry_arg);
+            ctx.reg_alloc.DefineAsExisting(inst, operand_arg);
         } else if (shift_arg.IsImmediate()) {
             // TODO: Use RMIF
             const u8 shift = shift_arg.GetImmediateU8();
@@ -541,8 +541,8 @@ void EmitIR<IR::Opcode::ArithmeticShiftRight32>(oaknut::CodeGenerator& code, Emi
         }
     } else {
         if (shift_arg.IsImmediate() && shift_arg.GetImmediateU8() == 0) {
-            ctx.reg_alloc.DefineAsExisting(inst, operand_arg);
             ctx.reg_alloc.DefineAsExisting(carry_inst, carry_arg);
+            ctx.reg_alloc.DefineAsExisting(inst, operand_arg);
         } else if (shift_arg.IsImmediate()) {
             // TODO: Use RMIF
 
@@ -632,11 +632,10 @@ void EmitIR<IR::Opcode::RotateRight32>(oaknut::CodeGenerator& code, EmitContext&
     auto& carry_arg = args[2];
 
     if (shift_arg.IsImmediate() && shift_arg.GetImmediateU8() == 0) {
-        ctx.reg_alloc.DefineAsExisting(inst, operand_arg);
-
         if (carry_inst) {
             ctx.reg_alloc.DefineAsExisting(carry_inst, carry_arg);
         }
+        ctx.reg_alloc.DefineAsExisting(inst, operand_arg);
     } else if (shift_arg.IsImmediate()) {
         const u8 shift = shift_arg.GetImmediateU8() % 32;
         auto Wresult = ctx.reg_alloc.WriteW(inst);
diff --git a/src/dynarmic/backend/arm64/reg_alloc.cpp b/src/dynarmic/backend/arm64/reg_alloc.cpp
index f60da3e1..82bb02e7 100644
--- a/src/dynarmic/backend/arm64/reg_alloc.cpp
+++ b/src/dynarmic/backend/arm64/reg_alloc.cpp
@@ -170,12 +170,13 @@ void RegAlloc::PrepareForCall(IR::Inst* result, std::optional<Argument::copyable
 }
 
 void RegAlloc::DefineAsExisting(IR::Inst* inst, Argument& arg) {
+    ASSERT(!ValueLocation(inst));
+
     if (arg.value.IsImmediate()) {
         inst->ReplaceUsesWith(arg.value);
         return;
     }
 
-    ASSERT(!ValueLocation(inst));
     auto& info = ValueInfo(arg.value.GetInst());
     info.values.emplace_back(inst);
     info.expected_uses += inst->UseCount();