Merge pull request #480 from lioncash/info
common/fp/info: Make half-precision info struct functions return correctly sized types
This commit is contained in:
commit
2d3aa9b8fb
10 changed files with 44 additions and 33 deletions
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@ -31,10 +31,21 @@ struct FPInfo<u16> {
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static constexpr int exponent_max = 15;
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static constexpr int exponent_bias = 15;
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static constexpr u32 Zero(bool sign) { return sign ? sign_mask : 0; }
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static constexpr u32 Infinity(bool sign) { return exponent_mask | Zero(sign); }
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static constexpr u32 MaxNormal(bool sign) { return (exponent_mask - 1) | Zero(sign); }
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static constexpr u32 DefaultNaN() { return exponent_mask | (u32(1) << (explicit_mantissa_width - 1)); }
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static constexpr u16 Zero(bool sign) {
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return sign ? static_cast<u16>(sign_mask) : u16{0};
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}
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static constexpr u16 Infinity(bool sign) {
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return static_cast<u16>(exponent_mask | Zero(sign));
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}
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static constexpr u16 MaxNormal(bool sign) {
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return static_cast<u16>((exponent_mask - 1) | Zero(sign));
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}
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static constexpr u16 DefaultNaN() {
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return static_cast<u16>(exponent_mask | (u32(1) << (explicit_mantissa_width - 1)));
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}
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};
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template<>
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@ -88,7 +99,7 @@ struct FPInfo<u64> {
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template<typename FPT, bool sign, int exponent, FPT value>
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constexpr FPT FPValue() {
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if constexpr (value == 0) {
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return FPT(FPInfo<FPT>::Zero(sign));
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return FPInfo<FPT>::Zero(sign);
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}
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constexpr int point_position = static_cast<int>(FPInfo<FPT>::explicit_mantissa_width);
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@ -35,7 +35,7 @@ FPT FPMulAdd(FPT addend, FPT op1, FPT op2, FPCR fpcr, FPSR& fpsr) {
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if (typeA == FPType::QNaN && ((inf1 && zero2) || (zero1 && inf2))) {
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FPProcessException(FPExc::InvalidOp, fpcr, fpsr);
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return FPT(FPInfo<FPT>::DefaultNaN());
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return FPInfo<FPT>::DefaultNaN();
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}
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if (maybe_nan) {
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@ -50,25 +50,25 @@ FPT FPMulAdd(FPT addend, FPT op1, FPT op2, FPCR fpcr, FPSR& fpsr) {
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// Raise NaN on (inf * inf) of opposite signs or (inf * zero).
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if ((inf1 && zero2) || (zero1 && inf2) || (infA && infP && signA != signP)) {
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FPProcessException(FPExc::InvalidOp, fpcr, fpsr);
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return FPT(FPInfo<FPT>::DefaultNaN());
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return FPInfo<FPT>::DefaultNaN();
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}
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// Handle infinities
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if ((infA && !signA) || (infP && !signP)) {
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return FPT(FPInfo<FPT>::Infinity(false));
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return FPInfo<FPT>::Infinity(false);
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}
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if ((infA && signA) || (infP && signP)) {
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return FPT(FPInfo<FPT>::Infinity(true));
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return FPInfo<FPT>::Infinity(true);
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}
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// Result is exactly zero
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if (zeroA && zeroP && signA == signP) {
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return FPT(FPInfo<FPT>::Zero(signA));
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return FPInfo<FPT>::Zero(signA);
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}
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const FPUnpacked result_value = FusedMulAdd(valueA, value1, value2);
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if (result_value.mantissa == 0) {
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return FPT(FPInfo<FPT>::Zero(rounding == RoundingMode::TowardsMinusInfinity));
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return FPInfo<FPT>::Zero(rounding == RoundingMode::TowardsMinusInfinity);
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}
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return FPRound<FPT>(result_value, fpcr, fpsr);
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}
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@ -27,16 +27,16 @@ FPT FPRSqrtEstimate(FPT op, FPCR fpcr, FPSR& fpsr) {
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if (type == FPType::Zero) {
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FPProcessException(FPExc::DivideByZero, fpcr, fpsr);
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return FPT(FPInfo<FPT>::Infinity(sign));
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return FPInfo<FPT>::Infinity(sign);
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}
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if (sign) {
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FPProcessException(FPExc::InvalidOp, fpcr, fpsr);
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return FPT(FPInfo<FPT>::DefaultNaN());
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return FPInfo<FPT>::DefaultNaN();
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}
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if (type == FPType::Infinity) {
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return FPT(FPInfo<FPT>::Zero(false));
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return FPInfo<FPT>::Zero(false);
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}
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const int result_exponent = (-(value.exponent + 1)) >> 1;
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@ -37,7 +37,7 @@ FPT FPRSqrtStepFused(FPT op1, FPT op2, FPCR fpcr, FPSR& fpsr) {
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}
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if (inf1 || inf2) {
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return FPT(FPInfo<FPT>::Infinity(sign1 != sign2));
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return FPInfo<FPT>::Infinity(sign1 != sign2);
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}
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// result_value = (3.0 + (value1 * value2)) / 2.0
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@ -45,7 +45,7 @@ FPT FPRSqrtStepFused(FPT op1, FPT op2, FPCR fpcr, FPSR& fpsr) {
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result_value.exponent--;
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if (result_value.mantissa == 0) {
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return FPT(FPInfo<FPT>::Zero(fpcr.RMode() == RoundingMode::TowardsMinusInfinity));
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return FPInfo<FPT>::Zero(fpcr.RMode() == RoundingMode::TowardsMinusInfinity);
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}
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return FPRound<FPT>(result_value, fpcr, fpsr);
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}
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@ -31,12 +31,12 @@ FPT FPRecipEstimate(FPT op, FPCR fpcr, FPSR& fpsr) {
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}
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if (type == FPType::Infinity) {
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return FPT(FPInfo<FPT>::Zero(sign));
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return FPInfo<FPT>::Zero(sign);
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}
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if (type == FPType::Zero) {
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FPProcessException(FPExc::DivideByZero, fpcr, fpsr);
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return FPT(FPInfo<FPT>::Infinity(sign));
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return FPInfo<FPT>::Infinity(sign);
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}
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if (value.exponent < FPInfo<FPT>::exponent_min - 2) {
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@ -58,13 +58,13 @@ FPT FPRecipEstimate(FPT op, FPCR fpcr, FPSR& fpsr) {
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FPProcessException(FPExc::Overflow, fpcr, fpsr);
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FPProcessException(FPExc::Inexact, fpcr, fpsr);
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return overflow_to_inf ? FPT(FPInfo<FPT>::Infinity(sign)) : FPT(FPInfo<FPT>::MaxNormal(sign));
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return overflow_to_inf ? FPInfo<FPT>::Infinity(sign) : FPInfo<FPT>::MaxNormal(sign);
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}
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if ((fpcr.FZ() && !std::is_same_v<FPT, u16>) || (fpcr.FZ16() && std::is_same_v<FPT, u16>)) {
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if (value.exponent >= -FPInfo<FPT>::exponent_min) {
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fpsr.UFC(true);
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return FPT(FPInfo<FPT>::Zero(sign));
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return FPInfo<FPT>::Zero(sign);
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}
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}
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@ -87,7 +87,7 @@ FPT FPRecipEstimate(FPT op, FPCR fpcr, FPSR& fpsr) {
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}
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}
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const FPT bits_sign = FPT(FPInfo<FPT>::Zero(sign));
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const FPT bits_sign = FPInfo<FPT>::Zero(sign);
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const FPT bits_exponent = static_cast<FPT>(result_exponent + FPInfo<FPT>::exponent_bias);
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const FPT bits_mantissa = static_cast<FPT>(estimate);
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return FPT((bits_exponent << FPInfo<FPT>::explicit_mantissa_width) | (bits_mantissa & FPInfo<FPT>::mantissa_mask) | bits_sign);
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@ -38,7 +38,7 @@ FPT FPRecipExponent(FPT op, FPCR fpcr, FPSR& fpsr) {
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return FPProcessNaN(type, op, fpcr, fpsr);
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}
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const FPT sign_bits = FPT(FPInfo<FPT>::Zero(sign));
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const FPT sign_bits = FPInfo<FPT>::Zero(sign);
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const FPT exponent = DetermineExponentValue<FPT>(op);
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// Zero and denormals
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@ -37,14 +37,14 @@ FPT FPRecipStepFused(FPT op1, FPT op2, FPCR fpcr, FPSR& fpsr) {
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}
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if (inf1 || inf2) {
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return FPT(FPInfo<FPT>::Infinity(sign1 != sign2));
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return FPInfo<FPT>::Infinity(sign1 != sign2);
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}
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// result_value = 2.0 + (value1 * value2)
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const FPUnpacked result_value = FusedMulAdd(ToNormalized(false, 0, 2), value1, value2);
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if (result_value.mantissa == 0) {
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return FPT(FPInfo<FPT>::Zero(fpcr.RMode() == RoundingMode::TowardsMinusInfinity));
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return FPInfo<FPT>::Zero(fpcr.RMode() == RoundingMode::TowardsMinusInfinity);
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}
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return FPRound<FPT>(result_value, fpcr, fpsr);
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}
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@ -31,11 +31,11 @@ u64 FPRoundInt(FPT op, FPCR fpcr, RoundingMode rounding, bool exact, FPSR& fpsr)
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}
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if (type == FPType::Infinity) {
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return FPT(FPInfo<FPT>::Infinity(sign));
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return FPInfo<FPT>::Infinity(sign);
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}
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if (type == FPType::Zero) {
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return FPT(FPInfo<FPT>::Zero(sign));
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return FPInfo<FPT>::Zero(sign);
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}
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// Reshift decimal point back to bit zero.
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@ -79,7 +79,7 @@ u64 FPRoundInt(FPT op, FPCR fpcr, RoundingMode rounding, bool exact, FPSR& fpsr)
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const u64 abs_int_result = new_sign ? Safe::Negate<u64>(int_result) : static_cast<u64>(int_result);
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const FPT result = int_result == 0
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? FPT(FPInfo<FPT>::Zero(sign))
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? FPInfo<FPT>::Zero(sign)
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: FPRound<FPT>(FPUnpacked{new_sign, normalized_point_position, abs_int_result}, fpcr, RoundingMode::TowardsZero, fpsr);
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if (error != ResidualError::Zero && exact) {
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@ -31,7 +31,7 @@ FPT FPProcessNaN(FPType type, FPT op, FPCR fpcr, FPSR& fpsr) {
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}
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if (fpcr.DN()) {
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result = FPT(FPInfo<FPT>::DefaultNaN());
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result = FPInfo<FPT>::DefaultNaN();
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}
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return result;
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@ -90,7 +90,7 @@ FPT FPRoundBase(FPUnpacked op, FPCR fpcr, RoundingMode rounding, FPSR& fpsr) {
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if (((!isFP16 && fpcr.FZ()) || (isFP16 && fpcr.FZ16())) && exponent < minimum_exp) {
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fpsr.UFC(true);
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return FPT(FPInfo<FPT>::Zero(sign));
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return FPInfo<FPT>::Zero(sign);
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}
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int biased_exp = std::max<int>(exponent - minimum_exp + 1, 0);
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@ -153,7 +153,7 @@ FPT FPRoundBase(FPUnpacked op, FPCR fpcr, RoundingMode rounding, FPSR& fpsr) {
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#endif
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constexpr int max_biased_exp = (1 << E) - 1;
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if (biased_exp >= max_biased_exp) {
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result = overflow_to_inf ? FPT(FPInfo<FPT>::Infinity(sign)) : FPT(FPInfo<FPT>::MaxNormal(sign));
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result = overflow_to_inf ? FPInfo<FPT>::Infinity(sign) : FPInfo<FPT>::MaxNormal(sign);
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FPProcessException(FPExc::Overflow, fpcr, fpsr);
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FPProcessException(FPExc::Inexact, fpcr, fpsr);
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} else {
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