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A64: Implement SMULL{2}

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Lioncash 2018-05-15 10:20:03 -04:00 committed by MerryMage
parent 329137a277
commit 2d1aca25e6
2 changed files with 21 additions and 1 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -686,7 +686,7 @@ INST(SUBHN, "SUBHN, SUBHN2", "0Q001
INST(SABDL, "SABDL, SABDL2", "0Q001110zz1mmmmm011100nnnnnddddd")
//INST(SMLAL_vec, "SMLAL, SMLAL2 (vector)", "0Q001110zz1mmmmm100000nnnnnddddd")
//INST(SMLSL_vec, "SMLSL, SMLSL2 (vector)", "0Q001110zz1mmmmm101000nnnnnddddd")
//INST(SMULL_vec, "SMULL, SMULL2 (vector)", "0Q001110zz1mmmmm110000nnnnnddddd")
INST(SMULL_vec, "SMULL, SMULL2 (vector)", "0Q001110zz1mmmmm110000nnnnnddddd")
//INST(PMULL, "PMULL, PMULL2", "0Q001110zz1mmmmm111000nnnnnddddd")
INST(UADDL, "UADDL, UADDL2", "0Q101110zz1mmmmm000000nnnnnddddd")
INST(UADDW, "UADDW, UADDW2", "0Q101110zz1mmmmm000100nnnnnddddd")

20
src/frontend/A64/translate/impl/simd_three_different.cpp
View file

@ -35,6 +35,17 @@ void AbsoluteDifferenceLong(TranslatorVisitor& v, bool Q, Imm<2> size, Vec Vm, V
v.V(2 * datasize, Vd, result);
}
void MultiplyLong(TranslatorVisitor& v, bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
const size_t esize = 8 << size.ZeroExtend();
const size_t datasize = 64;
const IR::U128 operand1 = v.ir.VectorSignExtend(esize, v.Vpart(datasize, Vn, Q));
const IR::U128 operand2 = v.ir.VectorSignExtend(esize, v.Vpart(datasize, Vm, Q));
const IR::U128 product = v.ir.VectorMultiply(2 * esize, operand1, operand2);
v.V(2 * datasize, Vd, product);
}
} // Anonymous namespace
bool TranslatorVisitor::SABAL(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
@ -87,6 +98,15 @@ bool TranslatorVisitor::SADDW(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
return true;
}
bool TranslatorVisitor::SMULL_vec(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size == 0b11) {
return ReservedValue();
}
MultiplyLong(*this, Q, size, Vm, Vn, Vd);
return true;
}
bool TranslatorVisitor::SSUBW(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size == 0b11) {
return ReservedValue();