emit_x64_vector_floating_point: Simplify EmitVectorOperation*
This commit is contained in:
MerryMage
parent
1edd0125b2
commit
25b28bb234
1 changed files with 66 additions and 105 deletions
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@ -4,16 +4,20 @@
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* General Public License version 2 or any later version.
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*/
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#include <array>
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#include <type_traits>
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#include <utility>
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#include "backend_x64/abi.h"
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#include "backend_x64/block_of_code.h"
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#include "backend_x64/emit_x64.h"
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#include "common/bit_util.h"
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#include "common/fp/fpcr.h"
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#include "common/fp/info.h"
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#include "common/fp/op.h"
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#include "common/fp/util.h"
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#include "common/mp/function_info.h"
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#include "common/mp/integer.h"
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#include "frontend/ir/basic_block.h"
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#include "frontend/ir/microinstruction.h"
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@ -22,23 +26,38 @@ namespace Dynarmic::BackendX64 {
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using namespace Xbyak::util;
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namespace mp = Common::mp;
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template <typename T>
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struct NaNWrapper;
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template <size_t fsize, typename T>
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static T ChooseOnFsize(T f32, T f64) {
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static_assert(fsize == 32 || fsize == 64, "fsize must be either 32 or 64");
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template <>
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struct NaNWrapper<u32> {
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static constexpr u32 value = 0x7fc00000;
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};
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if constexpr (fsize == 32) {
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return f32;
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} else {
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return f64;
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}
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}
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template <>
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struct NaNWrapper<u64> {
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static constexpr u64 value = 0x7ff8'0000'0000'0000;
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};
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#define FCODE(NAME) (code.*ChooseOnFsize<fsize>(&Xbyak::CodeGenerator::NAME##s, &Xbyak::CodeGenerator::NAME##d))
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template <typename T, auto IndexFunction>
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static void HandleNaNs(BlockOfCode& code, EmitContext& ctx, const Xbyak::Xmm& xmm_a,
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const Xbyak::Xmm& xmm_b, const Xbyak::Xmm& result, const Xbyak::Xmm& nan_mask) {
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static_assert(std::is_same_v<T, u32> || std::is_same_v<T, u64>, "T must be either u32 or u64");
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template<typename T, auto IndexFunction, size_t... argi>
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static auto GetRuntimeNaNFunction(std::index_sequence<argi...>) {
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auto result = [](std::array<VectorArray<T>, sizeof...(argi) + 1>& values) {
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VectorArray<T>& result = values[0];
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for (size_t elementi = 0; elementi < result.size(); ++elementi) {
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const auto current_values = IndexFunction(elementi, values[argi + 1]...);
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if (auto r = FP::ProcessNaNs(std::get<argi>(current_values)...)) {
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result[elementi] = *r;
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} else if (FP::IsNaN(result[elementi])) {
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result[elementi] = FP::FPInfo<T>::DefaultNaN();
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}
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}
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};
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return static_cast<mp::equivalent_function_type_t<decltype(result)>*>(result);
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}
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template <size_t fsize, size_t nargs, auto IndexFunction>
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static void HandleNaNs(BlockOfCode& code, EmitContext& ctx, std::array<Xbyak::Xmm, nargs + 1> xmms, const Xbyak::Xmm& nan_mask) {
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static_assert(fsize == 32 || fsize == 64, "fsize must be either 32 or 64");
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if (code.DoesCpuSupport(Xbyak::util::Cpu::tSSE41)) {
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code.ptest(nan_mask, nan_mask);
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@ -57,29 +76,21 @@ static void HandleNaNs(BlockOfCode& code, EmitContext& ctx, const Xbyak::Xmm& xm
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code.SwitchToFarCode();
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code.L(nan);
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const Xbyak::Xmm result = xmms[0];
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code.sub(rsp, 8);
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ABI_PushCallerSaveRegistersAndAdjustStackExcept(code, HostLocXmmIdx(result.getIdx()));
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const size_t stack_space = 3 * 16;
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code.sub(rsp, stack_space + ABI_SHADOW_SPACE);
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code.lea(code.ABI_PARAM1, ptr[rsp + ABI_SHADOW_SPACE + 0 * 16]);
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code.lea(code.ABI_PARAM2, ptr[rsp + ABI_SHADOW_SPACE + 1 * 16]);
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code.lea(code.ABI_PARAM3, ptr[rsp + ABI_SHADOW_SPACE + 2 * 16]);
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code.movaps(xword[code.ABI_PARAM1], result);
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code.movaps(xword[code.ABI_PARAM2], xmm_a);
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code.movaps(xword[code.ABI_PARAM3], xmm_b);
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code.CallFunction(static_cast<void(*)(VectorArray<T>&, const VectorArray<T>&, const VectorArray<T>&)>(
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[](VectorArray<T>& result, const VectorArray<T>& a, const VectorArray<T>& b) {
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for (size_t i = 0; i < result.size(); ++i) {
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auto [first, second] = IndexFunction(i, a, b);
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if (auto r = FP::ProcessNaNs(first, second)) {
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result[i] = *r;
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} else if (FP::IsNaN(result[i])) {
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result[i] = NaNWrapper<T>::value;
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}
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}
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}
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));
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const size_t stack_space = xmms.size() * 16;
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code.sub(rsp, stack_space + ABI_SHADOW_SPACE);
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for (size_t i = 0; i < xmms.size(); ++i) {
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code.movaps(xword[rsp + ABI_SHADOW_SPACE + i * 16], xmms[i]);
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}
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code.lea(code.ABI_PARAM1, ptr[rsp + ABI_SHADOW_SPACE + 0 * 16]);
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using T = mp::unsigned_integer_of_size<fsize>;
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code.CallFunction(GetRuntimeNaNFunction<T, IndexFunction>(std::make_index_sequence<nargs>{}));
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code.movaps(result, xword[rsp + ABI_SHADOW_SPACE + 0 * 16]);
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code.add(rsp, stack_space + ABI_SHADOW_SPACE);
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@ -123,8 +134,10 @@ static std::tuple<u64, u64> PairedLowerIndexFunction64(size_t i, const VectorArr
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return i == 0 ? std::make_tuple(a[0], b[0]) : std::make_tuple(u64(0), u64(0));
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}
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template <auto IndexFunction, typename Function>
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static void EmitVectorOperation32(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) {
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template <size_t fsize, auto IndexFunction, typename Function>
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static void EmitThreeOpVectorOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) {
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static_assert(fsize == 32 || fsize == 64, "fsize must be either 32 or 64");
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if (!ctx.AccurateNaN() || ctx.FPSCR_DN()) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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Xbyak::Xmm xmm_a = ctx.reg_alloc.UseScratchXmm(args[0]);
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@ -141,10 +154,10 @@ static void EmitVectorOperation32(BlockOfCode& code, EmitContext& ctx, IR::Inst*
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Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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code.pcmpeqw(tmp, tmp);
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code.movaps(nan_mask, xmm_a);
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code.cmpordps(nan_mask, nan_mask);
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FCODE(cmpordp)(nan_mask, nan_mask);
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code.andps(xmm_a, nan_mask);
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code.xorps(nan_mask, tmp);
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code.andps(nan_mask, code.MConst(xword, 0x7fc0'0000'7fc0'0000, 0x7fc0'0000'7fc0'0000));
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code.andps(nan_mask, fsize == 32 ? code.MConst(xword, 0x7fc0'0000'7fc0'0000, 0x7fc0'0000'7fc0'0000) : code.MConst(xword, 0x7ff8'0000'0000'0000, 0x7ff8'0000'0000'0000));
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code.orps(xmm_a, nan_mask);
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}
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@ -161,67 +174,15 @@ static void EmitVectorOperation32(BlockOfCode& code, EmitContext& ctx, IR::Inst*
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code.movaps(nan_mask, xmm_b);
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code.movaps(result, xmm_a);
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code.cmpunordps(nan_mask, xmm_a);
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FCODE(cmpunordp)(nan_mask, xmm_a);
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if constexpr (std::is_member_function_pointer_v<Function>) {
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(code.*fn)(result, xmm_b);
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} else {
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fn(result, xmm_b);
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}
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code.cmpunordps(nan_mask, result);
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FCODE(cmpunordp)(nan_mask, result);
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HandleNaNs<u32, IndexFunction>(code, ctx, xmm_a, xmm_b, result, nan_mask);
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ctx.reg_alloc.DefineValue(inst, result);
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}
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template <auto IndexFunction, typename Function>
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static void EmitVectorOperation64(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) {
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if (!ctx.AccurateNaN() || ctx.FPSCR_DN()) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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Xbyak::Xmm xmm_a = ctx.reg_alloc.UseScratchXmm(args[0]);
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Xbyak::Xmm xmm_b = ctx.reg_alloc.UseXmm(args[1]);
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if constexpr (std::is_member_function_pointer_v<Function>) {
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(code.*fn)(xmm_a, xmm_b);
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} else {
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fn(xmm_a, xmm_b);
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}
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if (ctx.FPSCR_DN()) {
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Xbyak::Xmm nan_mask = ctx.reg_alloc.ScratchXmm();
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Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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code.pcmpeqw(tmp, tmp);
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code.movaps(nan_mask, xmm_a);
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code.cmpordpd(nan_mask, nan_mask);
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code.andps(xmm_a, nan_mask);
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code.xorps(nan_mask, tmp);
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code.andps(nan_mask, code.MConst(xword, 0x7ff8'0000'0000'0000, 0x7ff8'0000'0000'0000));
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code.orps(xmm_a, nan_mask);
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}
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ctx.reg_alloc.DefineValue(inst, xmm_a);
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return;
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}
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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Xbyak::Label end, nan;
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Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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Xbyak::Xmm xmm_a = ctx.reg_alloc.UseXmm(args[0]);
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Xbyak::Xmm xmm_b = ctx.reg_alloc.UseXmm(args[1]);
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Xbyak::Xmm nan_mask = ctx.reg_alloc.ScratchXmm();
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code.movaps(nan_mask, xmm_b);
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code.movaps(result, xmm_a);
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code.cmpunordpd(nan_mask, xmm_a);
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if constexpr (std::is_member_function_pointer_v<Function>) {
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(code.*fn)(result, xmm_b);
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} else {
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fn(result, xmm_b);
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}
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code.cmpunordpd(nan_mask, result);
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HandleNaNs<u64, IndexFunction>(code, ctx, xmm_a, xmm_b, result, nan_mask);
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HandleNaNs<fsize, 2, IndexFunction>(code, ctx, {result, xmm_a, xmm_b}, nan_mask);
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ctx.reg_alloc.DefineValue(inst, result);
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}
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@ -329,19 +290,19 @@ void EmitX64::EmitFPVectorAbs64(EmitContext& ctx, IR::Inst* inst) {
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}
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void EmitX64::EmitFPVectorAdd32(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation32<DefaultIndexFunction32>(code, ctx, inst, &Xbyak::CodeGenerator::addps);
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EmitThreeOpVectorOperation<32, DefaultIndexFunction32>(code, ctx, inst, &Xbyak::CodeGenerator::addps);
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}
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void EmitX64::EmitFPVectorAdd64(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation64<DefaultIndexFunction64>(code, ctx, inst, &Xbyak::CodeGenerator::addpd);
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EmitThreeOpVectorOperation<64, DefaultIndexFunction64>(code, ctx, inst, &Xbyak::CodeGenerator::addpd);
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}
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void EmitX64::EmitFPVectorDiv32(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation32<DefaultIndexFunction32>(code, ctx, inst, &Xbyak::CodeGenerator::divps);
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EmitThreeOpVectorOperation<32, DefaultIndexFunction32>(code, ctx, inst, &Xbyak::CodeGenerator::divps);
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}
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void EmitX64::EmitFPVectorDiv64(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation64<DefaultIndexFunction64>(code, ctx, inst, &Xbyak::CodeGenerator::divpd);
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EmitThreeOpVectorOperation<64, DefaultIndexFunction64>(code, ctx, inst, &Xbyak::CodeGenerator::divpd);
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}
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void EmitX64::EmitFPVectorEqual32(EmitContext& ctx, IR::Inst* inst) {
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@ -405,23 +366,23 @@ void EmitX64::EmitFPVectorGreaterEqual64(EmitContext& ctx, IR::Inst* inst) {
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}
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void EmitX64::EmitFPVectorMul32(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation32<DefaultIndexFunction32>(code, ctx, inst, &Xbyak::CodeGenerator::mulps);
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EmitThreeOpVectorOperation<32, DefaultIndexFunction32>(code, ctx, inst, &Xbyak::CodeGenerator::mulps);
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}
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void EmitX64::EmitFPVectorMul64(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation64<DefaultIndexFunction64>(code, ctx, inst, &Xbyak::CodeGenerator::mulpd);
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EmitThreeOpVectorOperation<64, DefaultIndexFunction64>(code, ctx, inst, &Xbyak::CodeGenerator::mulpd);
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}
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void EmitX64::EmitFPVectorPairedAdd32(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation32<PairedIndexFunction32>(code, ctx, inst, &Xbyak::CodeGenerator::haddps);
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EmitThreeOpVectorOperation<32, PairedIndexFunction32>(code, ctx, inst, &Xbyak::CodeGenerator::haddps);
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}
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void EmitX64::EmitFPVectorPairedAdd64(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation64<PairedIndexFunction64>(code, ctx, inst, &Xbyak::CodeGenerator::haddpd);
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EmitThreeOpVectorOperation<64, PairedIndexFunction64>(code, ctx, inst, &Xbyak::CodeGenerator::haddpd);
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}
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void EmitX64::EmitFPVectorPairedAddLower32(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation32<PairedLowerIndexFunction32>(code, ctx, inst, [&](Xbyak::Xmm result, Xbyak::Xmm xmm_b) {
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EmitThreeOpVectorOperation<32, PairedLowerIndexFunction32>(code, ctx, inst, [&](Xbyak::Xmm result, Xbyak::Xmm xmm_b) {
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const Xbyak::Xmm zero = ctx.reg_alloc.ScratchXmm();
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code.xorps(zero, zero);
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code.punpcklqdq(result, xmm_b);
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@ -430,7 +391,7 @@ void EmitX64::EmitFPVectorPairedAddLower32(EmitContext& ctx, IR::Inst* inst) {
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}
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void EmitX64::EmitFPVectorPairedAddLower64(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation64<PairedLowerIndexFunction64>(code, ctx, inst, [&](Xbyak::Xmm result, Xbyak::Xmm xmm_b) {
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EmitThreeOpVectorOperation<64, PairedLowerIndexFunction64>(code, ctx, inst, [&](Xbyak::Xmm result, Xbyak::Xmm xmm_b) {
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const Xbyak::Xmm zero = ctx.reg_alloc.ScratchXmm();
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code.xorps(zero, zero);
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code.punpcklqdq(result, xmm_b);
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@ -523,11 +484,11 @@ void EmitX64::EmitFPVectorS64ToDouble(EmitContext& ctx, IR::Inst* inst) {
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}
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void EmitX64::EmitFPVectorSub32(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation32<DefaultIndexFunction32>(code, ctx, inst, &Xbyak::CodeGenerator::subps);
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EmitThreeOpVectorOperation<32, DefaultIndexFunction32>(code, ctx, inst, &Xbyak::CodeGenerator::subps);
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}
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void EmitX64::EmitFPVectorSub64(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation64<DefaultIndexFunction64>(code, ctx, inst, &Xbyak::CodeGenerator::subpd);
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EmitThreeOpVectorOperation<64, DefaultIndexFunction64>(code, ctx, inst, &Xbyak::CodeGenerator::subpd);
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}
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void EmitX64::EmitFPVectorU32ToSingle(EmitContext& ctx, IR::Inst* inst) {
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