load_store: Implement LDRSB and LDRSH.
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0e5593ba62
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218980cf69
1 changed files with 52 additions and 4 deletions
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@ -225,11 +225,35 @@ bool ArmTranslatorVisitor::arm_LDRHT() {
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}
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bool ArmTranslatorVisitor::arm_LDRSB_imm(Cond cond, bool P, bool U, bool W, Reg n, Reg d, Imm4 imm8a, Imm4 imm8b) {
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return InterpretThisInstruction();
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if (ConditionPassed(cond)) {
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const auto data = ir.SignExtendByteToWord(ir.ReadMemory8(GetAddressingMode(ir, P, U, W, n, ir.Imm32(imm8a << 4 | imm8b))));
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if (d == Reg::PC) {
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ir.ALUWritePC(ir.Add(data, ir.Imm32(4)));
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ir.SetTerm(IR::Term::ReturnToDispatch{});
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return false;
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}
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ir.SetRegister(d, data);
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}
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return true;
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}
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bool ArmTranslatorVisitor::arm_LDRSB_reg(Cond cond, bool P, bool U, bool W, Reg n, Reg d, Reg m) {
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return InterpretThisInstruction();
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if (ConditionPassed(cond)) {
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const auto data = ir.SignExtendByteToWord(ir.ReadMemory8(GetAddressingMode(ir, P, U, W, n, ir.GetRegister(m))));
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if (d == Reg::PC) {
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ir.ALUWritePC(ir.Add(data, ir.Imm32(4)));
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ir.SetTerm(IR::Term::ReturnToDispatch{});
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return false;
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}
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ir.SetRegister(d, data);
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}
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return true;
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}
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bool ArmTranslatorVisitor::arm_LDRSBT() {
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@ -237,11 +261,35 @@ bool ArmTranslatorVisitor::arm_LDRSBT() {
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}
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bool ArmTranslatorVisitor::arm_LDRSH_imm(Cond cond, bool P, bool U, bool W, Reg n, Reg d, Imm4 imm8a, Imm4 imm8b) {
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return InterpretThisInstruction();
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if (ConditionPassed(cond)) {
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const auto data = ir.SignExtendHalfToWord(ir.ReadMemory16(GetAddressingMode(ir, P, U, W, n, ir.Imm32(imm8a << 4 | imm8b))));
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if (d == Reg::PC) {
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ir.ALUWritePC(ir.Add(data, ir.Imm32(4)));
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ir.SetTerm(IR::Term::ReturnToDispatch{});
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return false;
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}
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ir.SetRegister(d, data);
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}
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return true;
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}
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bool ArmTranslatorVisitor::arm_LDRSH_reg(Cond cond, bool P, bool U, bool W, Reg n, Reg d, Reg m) {
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return InterpretThisInstruction();
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if (ConditionPassed(cond)) {
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const auto data = ir.SignExtendHalfToWord(ir.ReadMemory16(GetAddressingMode(ir, P, U, W, n, ir.GetRegister(m))));
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if (d == Reg::PC) {
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ir.ALUWritePC(ir.Add(data, ir.Imm32(4)));
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ir.SetTerm(IR::Term::ReturnToDispatch{});
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return false;
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}
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ir.SetRegister(d, data);
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}
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return true;
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}
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bool ArmTranslatorVisitor::arm_LDRSHT() {
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