Implement thumb1_SBC_reg
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parent
1953e44532
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207cb74dc9
3 changed files with 19 additions and 2 deletions
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@ -56,7 +56,7 @@ private:
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};
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};
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template <typename V>
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template <typename V>
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static const std::array<Thumb1Matcher<V>, 19> g_thumb1_instruction_table {{
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static const std::array<Thumb1Matcher<V>, 20> g_thumb1_instruction_table {{
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#define INST(fn, name, bitstring) detail::detail<Thumb1Matcher, u16, 16>::GetMatcher<decltype(fn), fn>(name, bitstring)
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#define INST(fn, name, bitstring) detail::detail<Thumb1Matcher, u16, 16>::GetMatcher<decltype(fn), fn>(name, bitstring)
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@ -80,7 +80,7 @@ static const std::array<Thumb1Matcher<V>, 19> g_thumb1_instruction_table {{
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{ INST(&V::thumb1_LSR_reg, "LSR (reg)", "0100000011mmmddd") },
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{ INST(&V::thumb1_LSR_reg, "LSR (reg)", "0100000011mmmddd") },
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{ INST(&V::thumb1_ASR_reg, "ASR (reg)", "0100000100mmmddd") },
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{ INST(&V::thumb1_ASR_reg, "ASR (reg)", "0100000100mmmddd") },
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{ INST(&V::thumb1_ADC_reg, "ADC (reg)", "0100000101mmmddd") },
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{ INST(&V::thumb1_ADC_reg, "ADC (reg)", "0100000101mmmddd") },
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//{ INST(&V::thumb1_SBCS_rr, "SBCS (rr)", "0100000110mmmddd") },
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{ INST(&V::thumb1_SBC_reg, "SBC (reg)", "0100000110mmmddd") },
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//{ INST(&V::thumb1_RORS_rr, "RORS (rr)", "0100000111sssddd") },
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//{ INST(&V::thumb1_RORS_rr, "RORS (rr)", "0100000111sssddd") },
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//{ INST(&V::thumb1_TST_rr, "TST (rr)", "0100001000mmmnnn") },
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//{ INST(&V::thumb1_TST_rr, "TST (rr)", "0100001000mmmnnn") },
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//{ INST(&V::thumb1_NEGS_rr, "NEGS (rr)", "0100001001mmmddd") },
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//{ INST(&V::thumb1_NEGS_rr, "NEGS (rr)", "0100001001mmmddd") },
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@ -170,6 +170,10 @@ public:
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return Common::StringFromFormat("adcs %s, %s", RegStr(d_n), RegStr(m));
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return Common::StringFromFormat("adcs %s, %s", RegStr(d_n), RegStr(m));
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}
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}
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std::string thumb1_SBC_reg(Reg m, Reg d_n) {
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return Common::StringFromFormat("sbcs %s, %s", RegStr(d_n), RegStr(m));
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}
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std::string thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) {
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std::string thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) {
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Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo;
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Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo;
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return Common::StringFromFormat("add %s, %s", RegStr(d_n), RegStr(m));
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return Common::StringFromFormat("add %s, %s", RegStr(d_n), RegStr(m));
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@ -226,6 +226,19 @@ struct TranslatorVisitor final {
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ir.SetVFlag(result.overflow);
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ir.SetVFlag(result.overflow);
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return true;
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return true;
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}
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}
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bool thumb1_SBC_reg(Reg m, Reg d_n) {
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Reg d = d_n, n = d_n;
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// SBCS <Rdn>, <Rm>
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// Note that it is not possible to encode Rd == R15.
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auto aspr_c = ir.GetCFlag();
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auto result = ir.SubWithCarry(ir.GetRegister(n), ir.GetRegister(m), aspr_c);
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ir.SetRegister(d, result.result);
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ir.SetNFlag(ir.MostSignificantBit(result.result));
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ir.SetZFlag(ir.IsZero(result.result));
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ir.SetCFlag(result.carry);
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ir.SetVFlag(result.overflow);
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return true;
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}
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bool thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) {
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bool thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) {
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Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo;
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Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo;
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