emit_x64_data_processing: Remove INVALID_REG
INVALID_REG.cvt8() now throws
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31a17c91c1
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1e1e9c17c7
1 changed files with 19 additions and 21 deletions
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@ -726,11 +726,9 @@ void EmitX64::EmitRotateRightExtended(EmitContext& ctx, IR::Inst* inst) {
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ctx.reg_alloc.DefineValue(inst, result);
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}
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const Xbyak::Reg64 INVALID_REG = Xbyak::Reg64(-1);
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static Xbyak::Reg8 DoCarry(RegAlloc& reg_alloc, Argument& carry_in, IR::Inst* carry_out) {
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if (carry_in.IsImmediate()) {
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return carry_out ? reg_alloc.ScratchGpr().cvt8() : INVALID_REG.cvt8();
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return carry_out ? reg_alloc.ScratchGpr().cvt8() : Xbyak::Reg8{-1};
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} else {
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return carry_out ? reg_alloc.UseScratchGpr(carry_in).cvt8() : reg_alloc.UseGpr(carry_in).cvt8();
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}
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@ -738,30 +736,30 @@ static Xbyak::Reg8 DoCarry(RegAlloc& reg_alloc, Argument& carry_in, IR::Inst* ca
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static Xbyak::Reg64 DoNZCV(BlockOfCode& code, RegAlloc& reg_alloc, IR::Inst* nzcv_out) {
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if (!nzcv_out)
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return INVALID_REG;
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return Xbyak::Reg64{-1};
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Xbyak::Reg64 nzcv = reg_alloc.ScratchGpr({HostLoc::RAX});
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const Xbyak::Reg64 nzcv = reg_alloc.ScratchGpr({HostLoc::RAX});
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code.xor_(nzcv.cvt32(), nzcv.cvt32());
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return nzcv;
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}
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static void EmitAdd(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, int bitsize) {
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auto carry_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetCarryFromOp);
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auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp);
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auto nzcv_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetNZCVFromOp);
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const auto carry_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetCarryFromOp);
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const auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp);
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const auto nzcv_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetNZCVFromOp);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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auto& carry_in = args[2];
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Xbyak::Reg64 nzcv = DoNZCV(code, ctx.reg_alloc, nzcv_inst);
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Xbyak::Reg result = ctx.reg_alloc.UseScratchGpr(args[0]).changeBit(bitsize);
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Xbyak::Reg8 carry = DoCarry(ctx.reg_alloc, carry_in, carry_inst);
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Xbyak::Reg8 overflow = overflow_inst ? ctx.reg_alloc.ScratchGpr().cvt8() : INVALID_REG.cvt8();
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const Xbyak::Reg64 nzcv = DoNZCV(code, ctx.reg_alloc, nzcv_inst);
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const Xbyak::Reg result = ctx.reg_alloc.UseScratchGpr(args[0]).changeBit(bitsize);
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const Xbyak::Reg8 carry = DoCarry(ctx.reg_alloc, carry_in, carry_inst);
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const Xbyak::Reg8 overflow = overflow_inst ? ctx.reg_alloc.ScratchGpr().cvt8() : Xbyak::Reg8{-1};
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// TODO: Consider using LEA.
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if (args[1].IsImmediate() && args[1].GetType() == IR::Type::U32) {
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u32 op_arg = args[1].GetImmediateU32();
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const u32 op_arg = args[1].GetImmediateU32();
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if (carry_in.IsImmediate()) {
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if (carry_in.GetImmediateU1()) {
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code.stc();
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@ -818,24 +816,24 @@ void EmitX64::EmitAdd64(EmitContext& ctx, IR::Inst* inst) {
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}
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static void EmitSub(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, int bitsize) {
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auto carry_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetCarryFromOp);
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auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp);
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auto nzcv_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetNZCVFromOp);
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const auto carry_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetCarryFromOp);
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const auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp);
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const auto nzcv_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetNZCVFromOp);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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auto& carry_in = args[2];
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Xbyak::Reg64 nzcv = DoNZCV(code, ctx.reg_alloc, nzcv_inst);
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Xbyak::Reg result = ctx.reg_alloc.UseScratchGpr(args[0]).changeBit(bitsize);
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Xbyak::Reg8 carry = DoCarry(ctx.reg_alloc, carry_in, carry_inst);
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Xbyak::Reg8 overflow = overflow_inst ? ctx.reg_alloc.ScratchGpr().cvt8() : INVALID_REG.cvt8();
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const Xbyak::Reg64 nzcv = DoNZCV(code, ctx.reg_alloc, nzcv_inst);
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const Xbyak::Reg result = ctx.reg_alloc.UseScratchGpr(args[0]).changeBit(bitsize);
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const Xbyak::Reg8 carry = DoCarry(ctx.reg_alloc, carry_in, carry_inst);
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const Xbyak::Reg8 overflow = overflow_inst ? ctx.reg_alloc.ScratchGpr().cvt8() : Xbyak::Reg8{-1};
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// TODO: Consider using LEA.
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// TODO: Optimize CMP case.
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// Note that x64 CF is inverse of what the ARM carry flag is here.
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if (args[1].IsImmediate() && args[1].GetType() == IR::Type::U32) {
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u32 op_arg = args[1].GetImmediateU32();
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const u32 op_arg = args[1].GetImmediateU32();
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if (carry_in.IsImmediate()) {
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if (carry_in.GetImmediateU1()) {
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code.sub(result, op_arg);
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