diff --git a/src/backend_x64/emit_x64.cpp b/src/backend_x64/emit_x64.cpp
index 46b97264..fe7825be 100644
--- a/src/backend_x64/emit_x64.cpp
+++ b/src/backend_x64/emit_x64.cpp
@@ -71,7 +71,7 @@ EmitX64::BlockDescriptor EmitX64::Emit(const Arm::LocationDescriptor descriptor,
 
     EmitCondPrelude(block);
 
-    for (auto iter = block.instructions.begin(); iter != block.instructions.end(); ++iter) {
+    for (auto iter = block.begin(); iter != block.end(); ++iter) {
         IR::Inst* inst = &*iter;
 
         // Call the relevant Emit* member function.
diff --git a/src/frontend/ir/basic_block.cpp b/src/frontend/ir/basic_block.cpp
index b8a32de7..2863f5cd 100644
--- a/src/frontend/ir/basic_block.cpp
+++ b/src/frontend/ir/basic_block.cpp
@@ -57,7 +57,7 @@ std::string DumpBlock(const IR::Block& block) {
         }
     };
 
-    for (auto inst = block.instructions.begin(); inst != block.instructions.end(); ++inst) {
+    for (auto inst = block.begin(); inst != block.end(); ++inst) {
         const Opcode op = inst->GetOpcode();
 
         if (GetTypeOf(op) != Type::Void) {
diff --git a/src/frontend/ir/basic_block.h b/src/frontend/ir/basic_block.h
index 155a4adb..2fd6d385 100644
--- a/src/frontend/ir/basic_block.h
+++ b/src/frontend/ir/basic_block.h
@@ -29,8 +29,38 @@ namespace IR {
  */
 class Block final {
 public:
+    using InstructionList        = Common::IntrusiveList<Inst>;
+    using iterator               = InstructionList::iterator;
+    using const_iterator         = InstructionList::const_iterator;
+    using reverse_iterator       = InstructionList::reverse_iterator;
+    using const_reverse_iterator = InstructionList::const_reverse_iterator;
+
     explicit Block(const Arm::LocationDescriptor& location) : location(location) {}
 
+    bool                   empty()   const { return instructions.empty();   }
+
+    Inst&                  front()         { return instructions.front();   }
+    const Inst&            front()   const { return instructions.front();   }
+
+    Inst&                  back()          { return instructions.back();    }
+    const Inst&            back()    const { return instructions.back();    }
+
+    iterator               begin()         { return instructions.begin();   }
+    const_iterator         begin()   const { return instructions.begin();   }
+    iterator               end()           { return instructions.end();     }
+    const_iterator         end()     const { return instructions.end();     }
+
+    reverse_iterator       rbegin()        { return instructions.rbegin();  }
+    const_reverse_iterator rbegin()  const { return instructions.rbegin();  }
+    reverse_iterator       rend()          { return instructions.rend();    }
+    const_reverse_iterator rend()    const { return instructions.rend();    }
+
+    const_iterator         cbegin()  const { return instructions.cbegin();  }
+    const_iterator         cend()    const { return instructions.cend();    }
+
+    const_reverse_iterator crbegin() const { return instructions.crbegin(); }
+    const_reverse_iterator crend()   const { return instructions.crend();   }
+
     /// Description of the starting location of this block
     Arm::LocationDescriptor location;
     /// Conditional to pass in order to execute this block
@@ -39,7 +69,7 @@ public:
     boost::optional<Arm::LocationDescriptor> cond_failed = {};
 
     /// List of instructions in this block.
-    Common::IntrusiveList<Inst> instructions;
+    InstructionList instructions;
     /// Memory pool for instruction list
     std::unique_ptr<Common::Pool> instruction_alloc_pool = std::make_unique<Common::Pool>(sizeof(Inst), 4096);
     /// Terminal instruction of this block.
diff --git a/src/frontend/translate/translate_arm.cpp b/src/frontend/translate/translate_arm.cpp
index f97c4650..a218ca35 100644
--- a/src/frontend/translate/translate_arm.cpp
+++ b/src/frontend/translate/translate_arm.cpp
@@ -66,7 +66,7 @@ bool ArmTranslatorVisitor::ConditionPassed(Cond cond) {
 
     // non-AL cond
 
-    if (!ir.block.instructions.empty()) {
+    if (!ir.block.empty()) {
         // We've already emitted instructions. Quit for now, we'll make a new block here later.
         cond_state = ConditionalState::Break;
         ir.SetTerm(IR::Term::LinkBlockFast{ir.current_location});
diff --git a/src/ir_opt/dead_code_elimination_pass.cpp b/src/ir_opt/dead_code_elimination_pass.cpp
index dec9eabd..d6e5801a 100644
--- a/src/ir_opt/dead_code_elimination_pass.cpp
+++ b/src/ir_opt/dead_code_elimination_pass.cpp
@@ -61,18 +61,18 @@ void DeadCodeElimination(IR::Block& block) {
     // We iterate over the instructions in reverse order.
     // This is because removing an instruction reduces the number of uses for earlier instructions.
 
-    if (block.instructions.empty()) {
+    if (block.empty()) {
         return;
     }
 
-    auto iter = block.instructions.end();
+    auto iter = block.end();
     do {
         --iter;
         if (!iter->HasUses() && is_side_effect_free(iter->GetOpcode())) {
             iter->Invalidate();
             iter = block.instructions.erase(iter);
         }
-    } while (iter != block.instructions.begin());
+    } while (iter != block.begin());
 }
 
 } // namespace Optimization
diff --git a/src/ir_opt/get_set_elimination_pass.cpp b/src/ir_opt/get_set_elimination_pass.cpp
index 161088b1..a1155dee 100644
--- a/src/ir_opt/get_set_elimination_pass.cpp
+++ b/src/ir_opt/get_set_elimination_pass.cpp
@@ -16,7 +16,7 @@ namespace Dynarmic {
 namespace Optimization {
 
 void GetSetElimination(IR::Block& block) {
-    using Iterator = decltype(block.instructions.begin());
+    using Iterator = decltype(block.begin());
     struct RegisterInfo {
         IR::Value register_value;
         bool set_instruction_present = false;
@@ -47,7 +47,7 @@ void GetSetElimination(IR::Block& block) {
         get_inst->ReplaceUsesWith(info.register_value);
     };
 
-    for (auto inst = block.instructions.begin(); inst != block.instructions.end(); ++inst) {
+    for (auto inst = block.begin(); inst != block.end(); ++inst) {
         switch (inst->GetOpcode()) {
             case IR::Opcode::SetRegister: {
                 Arm::Reg reg = inst->GetArg(0).GetRegRef();
diff --git a/src/ir_opt/verification_pass.cpp b/src/ir_opt/verification_pass.cpp
index 67036ed5..32699ec1 100644
--- a/src/ir_opt/verification_pass.cpp
+++ b/src/ir_opt/verification_pass.cpp
@@ -16,7 +16,7 @@ namespace Dynarmic {
 namespace Optimization {
 
 void VerificationPass(const IR::Block& block) {
-    for (const auto& inst : block.instructions) {
+    for (const auto& inst : block) {
         for (size_t i = 0; i < inst.NumArgs(); i++) {
             IR::Type t1 = inst.GetArg(i).GetType();
             IR::Type t2 = IR::GetArgTypeOf(inst.GetOpcode(), i);
@@ -28,7 +28,7 @@ void VerificationPass(const IR::Block& block) {
     }
 
     std::map<IR::Inst*, size_t> actual_uses;
-    for (const auto& inst : block.instructions) {
+    for (const auto& inst : block) {
         for (size_t i = 0; i < inst.NumArgs(); i++) {
             if (!inst.GetArg(i).IsImmediate()) {
                 actual_uses[inst.GetArg(i).GetInst()]++;