suyu/dynarmic
28
1
Fork 1
Code Issues Pull requests Projects Releases Packages Wiki Activity

Implement thumb1_ADC_reg

Browse source
This commit is contained in:
MerryMage 2016-07-08 22:17:39 +08:00
parent 9e9fa62d5f
commit 1953e44532
3 changed files with 19 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/frontend/decoder/thumb1.h
View file

@ -56,7 +56,7 @@ private:
}; };
template <typename V> template <typename V>
static const std::array<Thumb1Matcher<V>, 18> g_thumb1_instruction_table {{ static const std::array<Thumb1Matcher<V>, 19> g_thumb1_instruction_table {{
#define INST(fn, name, bitstring) detail::detail<Thumb1Matcher, u16, 16>::GetMatcher<decltype(fn), fn>(name, bitstring) #define INST(fn, name, bitstring) detail::detail<Thumb1Matcher, u16, 16>::GetMatcher<decltype(fn), fn>(name, bitstring)
@ -79,7 +79,7 @@ static const std::array<Thumb1Matcher<V>, 18> g_thumb1_instruction_table {{
{ INST(&V::thumb1_LSL_reg, "LSL (reg)", "0100000010mmmddd") }, { INST(&V::thumb1_LSL_reg, "LSL (reg)", "0100000010mmmddd") },
{ INST(&V::thumb1_LSR_reg, "LSR (reg)", "0100000011mmmddd") }, { INST(&V::thumb1_LSR_reg, "LSR (reg)", "0100000011mmmddd") },
{ INST(&V::thumb1_ASR_reg, "ASR (reg)", "0100000100mmmddd") }, { INST(&V::thumb1_ASR_reg, "ASR (reg)", "0100000100mmmddd") },
//{ INST(&V::thumb1_ADCS_rr, "ADCS (rr)", "0100000101mmmddd") }, { INST(&V::thumb1_ADC_reg, "ADC (reg)", "0100000101mmmddd") },
//{ INST(&V::thumb1_SBCS_rr, "SBCS (rr)", "0100000110mmmddd") }, //{ INST(&V::thumb1_SBCS_rr, "SBCS (rr)", "0100000110mmmddd") },
//{ INST(&V::thumb1_RORS_rr, "RORS (rr)", "0100000111sssddd") }, //{ INST(&V::thumb1_RORS_rr, "RORS (rr)", "0100000111sssddd") },
//{ INST(&V::thumb1_TST_rr, "TST (rr)", "0100001000mmmnnn") }, //{ INST(&V::thumb1_TST_rr, "TST (rr)", "0100001000mmmnnn") },

4
src/frontend/disassembler_thumb.cpp
View file

@ -166,6 +166,10 @@ public:
return Common::StringFromFormat("asrs %s, %s", RegStr(d_n), RegStr(m)); return Common::StringFromFormat("asrs %s, %s", RegStr(d_n), RegStr(m));
} }
std::string thumb1_ADC_reg(Reg m, Reg d_n) {
return Common::StringFromFormat("adcs %s, %s", RegStr(d_n), RegStr(m));
}
std::string thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) { std::string thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) {
Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo; Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo;
return Common::StringFromFormat("add %s, %s", RegStr(d_n), RegStr(m)); return Common::StringFromFormat("add %s, %s", RegStr(d_n), RegStr(m));

13
src/frontend/translate_thumb.cpp
View file

@ -213,6 +213,19 @@ struct TranslatorVisitor final {
ir.SetCFlag(result.carry); ir.SetCFlag(result.carry);
return true; return true;
} }
bool thumb1_ADC_reg(Reg m, Reg d_n) {
Reg d = d_n, n = d_n;
// ADCS <Rdn>, <Rm>
// Note that it is not possible to encode Rd == R15.
auto aspr_c = ir.GetCFlag();
auto result = ir.AddWithCarry(ir.GetRegister(n), ir.GetRegister(m), aspr_c);
ir.SetRegister(d, result.result);
ir.SetNFlag(ir.MostSignificantBit(result.result));
ir.SetZFlag(ir.IsZero(result.result));
ir.SetCFlag(result.carry);
ir.SetVFlag(result.overflow);
return true;
}
bool thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) { bool thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) {
Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo; Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo;