frontend/ir/ir_emitter: Use switch constructs in floating point opcodes where applicable
This'll reduce the amount of noise necessary in changes implementing half-precision instructions, as the type can just be prepended to the switch cases, instead of rewriting the whole if/else branch.
This commit is contained in:
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dd79a3dc6b
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0a35836998
1 changed files with 132 additions and 32 deletions
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@ -1805,80 +1805,122 @@ U16U32U64 IREmitter::FPAbs(const U16U32U64& a) {
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U32U64 IREmitter::FPAdd(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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U32U64 IREmitter::FPAdd(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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ASSERT(fpcr_controlled);
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ASSERT(fpcr_controlled);
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ASSERT(a.GetType() == b.GetType());
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U32>(Opcode::FPAdd32, a, b);
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return Inst<U32>(Opcode::FPAdd32, a, b);
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} else {
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case Type::U64:
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return Inst<U64>(Opcode::FPAdd64, a, b);
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return Inst<U64>(Opcode::FPAdd64, a, b);
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default:
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UNREACHABLE();
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return U32U64{};
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}
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}
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}
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}
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NZCV IREmitter::FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan, bool fpcr_controlled) {
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NZCV IREmitter::FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan, bool fpcr_controlled) {
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ASSERT(fpcr_controlled);
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ASSERT(fpcr_controlled);
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ASSERT(a.GetType() == b.GetType());
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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return Inst<NZCV>(Opcode::FPCompare32, a, b, Imm1(exc_on_qnan));
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const IR::U1 exc_on_qnan_imm = Imm1(exc_on_qnan);
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} else {
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return Inst<NZCV>(Opcode::FPCompare64, a, b, Imm1(exc_on_qnan));
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switch (a.GetType()) {
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case Type::U32:
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return Inst<NZCV>(Opcode::FPCompare32, a, b, exc_on_qnan_imm);
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case Type::U64:
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return Inst<NZCV>(Opcode::FPCompare64, a, b, exc_on_qnan_imm);
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default:
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UNREACHABLE();
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return NZCV{};
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}
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}
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}
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}
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U32U64 IREmitter::FPDiv(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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U32U64 IREmitter::FPDiv(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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ASSERT(fpcr_controlled);
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ASSERT(fpcr_controlled);
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ASSERT(a.GetType() == b.GetType());
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U32>(Opcode::FPDiv32, a, b);
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return Inst<U32>(Opcode::FPDiv32, a, b);
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} else {
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case Type::U64:
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return Inst<U64>(Opcode::FPDiv64, a, b);
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return Inst<U64>(Opcode::FPDiv64, a, b);
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default:
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UNREACHABLE();
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return U32U64{};
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}
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}
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}
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}
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U32U64 IREmitter::FPMax(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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U32U64 IREmitter::FPMax(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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ASSERT(fpcr_controlled);
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ASSERT(fpcr_controlled);
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ASSERT(a.GetType() == b.GetType());
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U32>(Opcode::FPMax32, a, b);
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return Inst<U32>(Opcode::FPMax32, a, b);
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} else {
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case Type::U64:
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return Inst<U64>(Opcode::FPMax64, a, b);
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return Inst<U64>(Opcode::FPMax64, a, b);
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default:
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UNREACHABLE();
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return U32U64{};
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}
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}
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}
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}
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U32U64 IREmitter::FPMaxNumeric(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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U32U64 IREmitter::FPMaxNumeric(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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ASSERT(fpcr_controlled);
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ASSERT(fpcr_controlled);
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ASSERT(a.GetType() == b.GetType());
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U32>(Opcode::FPMaxNumeric32, a, b);
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return Inst<U32>(Opcode::FPMaxNumeric32, a, b);
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} else {
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case Type::U64:
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return Inst<U64>(Opcode::FPMaxNumeric64, a, b);
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return Inst<U64>(Opcode::FPMaxNumeric64, a, b);
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default:
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UNREACHABLE();
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return U32U64{};
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}
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}
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}
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}
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U32U64 IREmitter::FPMin(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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U32U64 IREmitter::FPMin(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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ASSERT(fpcr_controlled);
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ASSERT(fpcr_controlled);
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ASSERT(a.GetType() == b.GetType());
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U32>(Opcode::FPMin32, a, b);
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return Inst<U32>(Opcode::FPMin32, a, b);
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} else {
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case Type::U64:
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return Inst<U64>(Opcode::FPMin64, a, b);
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return Inst<U64>(Opcode::FPMin64, a, b);
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default:
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UNREACHABLE();
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return U32U64{};
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}
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}
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}
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}
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U32U64 IREmitter::FPMinNumeric(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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U32U64 IREmitter::FPMinNumeric(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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ASSERT(fpcr_controlled);
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ASSERT(fpcr_controlled);
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ASSERT(a.GetType() == b.GetType());
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U32>(Opcode::FPMinNumeric32, a, b);
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return Inst<U32>(Opcode::FPMinNumeric32, a, b);
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} else {
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case Type::U64:
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return Inst<U64>(Opcode::FPMinNumeric64, a, b);
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return Inst<U64>(Opcode::FPMinNumeric64, a, b);
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default:
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UNREACHABLE();
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return U32U64{};
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}
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}
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}
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}
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U32U64 IREmitter::FPMul(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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U32U64 IREmitter::FPMul(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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ASSERT(fpcr_controlled);
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ASSERT(fpcr_controlled);
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ASSERT(a.GetType() == b.GetType());
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U32>(Opcode::FPMul32, a, b);
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return Inst<U32>(Opcode::FPMul32, a, b);
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} else {
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case Type::U64:
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return Inst<U64>(Opcode::FPMul64, a, b);
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return Inst<U64>(Opcode::FPMul64, a, b);
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default:
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UNREACHABLE();
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return U32U64{};
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}
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}
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}
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}
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@ -1901,10 +1943,15 @@ U16U32U64 IREmitter::FPMulAdd(const U16U32U64& a, const U16U32U64& b, const U16U
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U32U64 IREmitter::FPMulX(const U32U64& a, const U32U64& b) {
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U32U64 IREmitter::FPMulX(const U32U64& a, const U32U64& b) {
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ASSERT(a.GetType() == b.GetType());
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U32>(Opcode::FPMulX32, a, b);
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return Inst<U32>(Opcode::FPMulX32, a, b);
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} else {
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case Type::U64:
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return Inst<U64>(Opcode::FPMulX64, a, b);
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return Inst<U64>(Opcode::FPMulX64, a, b);
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default:
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UNREACHABLE();
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return U32U64{};
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}
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}
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}
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}
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@ -2014,20 +2061,29 @@ U16U32U64 IREmitter::FPRSqrtStepFused(const U16U32U64& a, const U16U32U64& b) {
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}
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}
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U32U64 IREmitter::FPSqrt(const U32U64& a) {
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U32U64 IREmitter::FPSqrt(const U32U64& a) {
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if (a.GetType() == Type::U32) {
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U32>(Opcode::FPSqrt32, a);
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return Inst<U32>(Opcode::FPSqrt32, a);
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} else {
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case Type::U64:
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return Inst<U64>(Opcode::FPSqrt64, a);
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return Inst<U64>(Opcode::FPSqrt64, a);
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default:
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UNREACHABLE();
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return U32U64{};
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}
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}
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}
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}
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U32U64 IREmitter::FPSub(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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U32U64 IREmitter::FPSub(const U32U64& a, const U32U64& b, bool fpcr_controlled) {
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ASSERT(fpcr_controlled);
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ASSERT(fpcr_controlled);
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ASSERT(a.GetType() == b.GetType());
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U32>(Opcode::FPSub32, a, b);
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return Inst<U32>(Opcode::FPSub32, a, b);
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} else {
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case Type::U64:
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return Inst<U64>(Opcode::FPSub64, a, b);
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return Inst<U64>(Opcode::FPSub64, a, b);
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default:
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UNREACHABLE();
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return U32U64{};
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}
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}
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}
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}
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@ -2133,26 +2189,70 @@ U64 IREmitter::FPToFixedU64(const U16U32U64& a, size_t fbits, FP::RoundingMode r
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U32 IREmitter::FPSignedFixedToSingle(const U32U64& a, size_t fbits, FP::RoundingMode rounding) {
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U32 IREmitter::FPSignedFixedToSingle(const U32U64& a, size_t fbits, FP::RoundingMode rounding) {
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ASSERT(fbits <= (a.GetType() == Type::U32 ? 32 : 64));
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ASSERT(fbits <= (a.GetType() == Type::U32 ? 32 : 64));
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const Opcode opcode = a.GetType() == Type::U32 ? Opcode::FPFixedS32ToSingle : Opcode::FPFixedS64ToSingle;
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return Inst<U32>(opcode, a, Imm8(static_cast<u8>(fbits)), Imm8(static_cast<u8>(rounding)));
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const IR::U8 fbits_imm = Imm8(static_cast<u8>(fbits));
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const IR::U8 rounding_imm = Imm8(static_cast<u8>(rounding));
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U32>(Opcode::FPFixedS32ToSingle, fbits_imm, rounding_imm);
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case Type::U64:
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return Inst<U32>(Opcode::FPFixedS64ToSingle, fbits_imm, rounding_imm);
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default:
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UNREACHABLE();
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return U32{};
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}
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}
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}
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U32 IREmitter::FPUnsignedFixedToSingle(const U32U64& a, size_t fbits, FP::RoundingMode rounding) {
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U32 IREmitter::FPUnsignedFixedToSingle(const U32U64& a, size_t fbits, FP::RoundingMode rounding) {
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ASSERT(fbits <= (a.GetType() == Type::U32 ? 32 : 64));
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ASSERT(fbits <= (a.GetType() == Type::U32 ? 32 : 64));
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const Opcode opcode = a.GetType() == Type::U32 ? Opcode::FPFixedU32ToSingle : Opcode::FPFixedU64ToSingle;
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return Inst<U32>(opcode, a, Imm8(static_cast<u8>(fbits)), Imm8(static_cast<u8>(rounding)));
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const IR::U8 fbits_imm = Imm8(static_cast<u8>(fbits));
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const IR::U8 rounding_imm = Imm8(static_cast<u8>(rounding));
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U32>(Opcode::FPFixedU32ToSingle, fbits_imm, rounding_imm);
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case Type::U64:
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return Inst<U32>(Opcode::FPFixedU64ToSingle, fbits_imm, rounding_imm);
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default:
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UNREACHABLE();
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return U32{};
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}
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}
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}
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U64 IREmitter::FPSignedFixedToDouble(const U32U64& a, size_t fbits, FP::RoundingMode rounding) {
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U64 IREmitter::FPSignedFixedToDouble(const U32U64& a, size_t fbits, FP::RoundingMode rounding) {
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ASSERT(fbits <= (a.GetType() == Type::U32 ? 32 : 64));
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ASSERT(fbits <= (a.GetType() == Type::U32 ? 32 : 64));
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const Opcode opcode = a.GetType() == Type::U32 ? Opcode::FPFixedS32ToDouble : Opcode::FPFixedS64ToDouble;
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return Inst<U64>(opcode, a, Imm8(static_cast<u8>(fbits)), Imm8(static_cast<u8>(rounding)));
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const IR::U8 fbits_imm = Imm8(static_cast<u8>(fbits));
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const IR::U8 rounding_imm = Imm8(static_cast<u8>(rounding));
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U64>(Opcode::FPFixedS32ToDouble, fbits_imm, rounding_imm);
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case Type::U64:
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return Inst<U64>(Opcode::FPFixedS64ToDouble, fbits_imm, rounding_imm);
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default:
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UNREACHABLE();
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return U64{};
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}
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}
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}
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U64 IREmitter::FPUnsignedFixedToDouble(const U32U64& a, size_t fbits, FP::RoundingMode rounding) {
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U64 IREmitter::FPUnsignedFixedToDouble(const U32U64& a, size_t fbits, FP::RoundingMode rounding) {
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ASSERT(fbits <= (a.GetType() == Type::U32 ? 32 : 64));
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ASSERT(fbits <= (a.GetType() == Type::U32 ? 32 : 64));
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const Opcode opcode = a.GetType() == Type::U32 ? Opcode::FPFixedU32ToDouble : Opcode::FPFixedU64ToDouble;
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return Inst<U64>(opcode, a, Imm8(static_cast<u8>(fbits)), Imm8(static_cast<u8>(rounding)));
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const IR::U8 fbits_imm = Imm8(static_cast<u8>(fbits));
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const IR::U8 rounding_imm = Imm8(static_cast<u8>(rounding));
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switch (a.GetType()) {
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case Type::U32:
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return Inst<U64>(Opcode::FPFixedU32ToDouble, fbits_imm, rounding_imm);
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case Type::U64:
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return Inst<U64>(Opcode::FPFixedU64ToDouble, fbits_imm, rounding_imm);
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default:
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UNREACHABLE();
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return U64{};
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}
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}
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}
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U128 IREmitter::FPVectorAbs(size_t esize, const U128& a) {
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U128 IREmitter::FPVectorAbs(size_t esize, const U128& a) {
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