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IR: Modify VectorSignedSaturatedShiftLeftUnsigned to only accept immediate shift amounts

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Merry 2022-08-06 14:55:44 +01:00 committed by merry
parent 3216ed3451
commit 08b123feb5
7 changed files with 48 additions and 28 deletions
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47
src/dynarmic/backend/x64/emit_x64_vector.cpp
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@ -129,6 +129,33 @@ static void EmitTwoArgumentFallbackWithSaturation(BlockOfCode& code, EmitContext
ctx.reg_alloc.DefineValue(inst, result); ctx.reg_alloc.DefineValue(inst, result);
} }
template<typename Lambda>
static void EmitTwoArgumentFallbackWithSaturationAndImmediate(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lambda lambda) {
const auto fn = static_cast<mcl::equivalent_function_type<Lambda>*>(lambda);
constexpr u32 stack_space = 2 * 16;
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
const Xbyak::Xmm arg1 = ctx.reg_alloc.UseXmm(args[0]);
const u8 arg2 = args[1].GetImmediateU8();
const Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
ctx.reg_alloc.EndOfAllocScope();
ctx.reg_alloc.HostCall(nullptr);
ctx.reg_alloc.AllocStackSpace(stack_space + ABI_SHADOW_SPACE);
code.lea(code.ABI_PARAM1, ptr[rsp + ABI_SHADOW_SPACE + 0 * 16]);
code.lea(code.ABI_PARAM2, ptr[rsp + ABI_SHADOW_SPACE + 1 * 16]);
code.movaps(xword[code.ABI_PARAM2], arg1);
code.mov(code.ABI_PARAM3, arg2);
code.CallFunction(fn);
code.movaps(result, xword[rsp + ABI_SHADOW_SPACE + 0 * 16]);
ctx.reg_alloc.ReleaseStackSpace(stack_space + ABI_SHADOW_SPACE);
code.or_(code.byte[code.r15 + code.GetJitStateInfo().offsetof_fpsr_qc], code.ABI_RETURN.cvt8());
ctx.reg_alloc.DefineValue(inst, result);
}
template<typename Lambda> template<typename Lambda>
static void EmitTwoArgumentFallback(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lambda lambda) { static void EmitTwoArgumentFallback(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lambda lambda) {
const auto fn = static_cast<mcl::equivalent_function_type<Lambda>*>(lambda); const auto fn = static_cast<mcl::equivalent_function_type<Lambda>*>(lambda);
@ -4436,27 +4463,19 @@ void EmitX64::EmitVectorSignedSaturatedShiftLeft64(EmitContext& ctx, IR::Inst* i
} }
template<typename T, typename U = std::make_unsigned_t<T>> template<typename T, typename U = std::make_unsigned_t<T>>
static bool VectorSignedSaturatedShiftLeftUnsigned(VectorArray<T>& dst, const VectorArray<T>& data, const VectorArray<T>& shift_values) { static bool VectorSignedSaturatedShiftLeftUnsigned(VectorArray<T>& dst, const VectorArray<T>& data, u8 shift_amount) {
static_assert(std::is_signed_v<T>, "T must be signed."); static_assert(std::is_signed_v<T>, "T must be signed.");
constexpr size_t bit_size_minus_one = mcl::bitsizeof<T> - 1;
bool qc_flag = false; bool qc_flag = false;
for (size_t i = 0; i < dst.size(); i++) { for (size_t i = 0; i < dst.size(); i++) {
const T element = data[i]; const T element = data[i];
const T shift = std::clamp<T>(static_cast<T>(mcl::bit::sign_extend<8>(static_cast<U>(shift_values[i] & 0xFF))), const T shift = static_cast<T>(shift_amount);
-static_cast<T>(bit_size_minus_one), std::numeric_limits<T>::max());
if (element == 0) { if (element == 0) {
dst[i] = 0; dst[i] = 0;
} else if (element < 0) { } else if (element < 0) {
dst[i] = 0; dst[i] = 0;
qc_flag = true; qc_flag = true;
} else if (shift < 0) {
dst[i] = static_cast<T>(element >> -shift);
} else if (static_cast<U>(shift) > bit_size_minus_one) {
dst[i] = static_cast<T>(std::numeric_limits<U>::max());
qc_flag = true;
} else { } else {
const U shifted = static_cast<U>(element) << static_cast<U>(shift); const U shifted = static_cast<U>(element) << static_cast<U>(shift);
const U shifted_test = shifted >> static_cast<U>(shift); const U shifted_test = shifted >> static_cast<U>(shift);
@ -4474,19 +4493,19 @@ static bool VectorSignedSaturatedShiftLeftUnsigned(VectorArray<T>& dst, const Ve
} }
void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned8(EmitContext& ctx, IR::Inst* inst) { void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned8(EmitContext& ctx, IR::Inst* inst) {
EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned<s8>); EmitTwoArgumentFallbackWithSaturationAndImmediate(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned<s8>);
} }
void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned16(EmitContext& ctx, IR::Inst* inst) { void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned16(EmitContext& ctx, IR::Inst* inst) {
EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned<s16>); EmitTwoArgumentFallbackWithSaturationAndImmediate(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned<s16>);
} }
void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned32(EmitContext& ctx, IR::Inst* inst) { void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned32(EmitContext& ctx, IR::Inst* inst) {
EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned<s32>); EmitTwoArgumentFallbackWithSaturationAndImmediate(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned<s32>);
} }
void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned64(EmitContext& ctx, IR::Inst* inst) { void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned64(EmitContext& ctx, IR::Inst* inst) {
EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned<s64>); EmitTwoArgumentFallbackWithSaturationAndImmediate(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned<s64>);
} }
void EmitX64::EmitVectorSub8(EmitContext& ctx, IR::Inst* inst) { void EmitX64::EmitVectorSub8(EmitContext& ctx, IR::Inst* inst) {

2
src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_shift.cpp
View file

@ -236,7 +236,7 @@ bool TranslatorVisitor::asimd_VQSHL(bool U, bool D, size_t imm6, size_t Vd, bool
return ir.VectorUnsignedSaturatedShiftLeft(esize, reg_m, shift_vec); return ir.VectorUnsignedSaturatedShiftLeft(esize, reg_m, shift_vec);
} }
return ir.VectorSignedSaturatedShiftLeftUnsigned(esize, reg_m, shift_vec); return ir.VectorSignedSaturatedShiftLeftUnsigned(esize, reg_m, shift_amount);
} }
if (op) { if (op) {
return ir.VectorSignedSaturatedShiftLeft(esize, reg_m, shift_vec); return ir.VectorSignedSaturatedShiftLeft(esize, reg_m, shift_vec);

4
src/dynarmic/frontend/A64/translate/impl/simd_scalar_shift_by_immediate.cpp
View file

@ -47,7 +47,7 @@ bool SaturatingShiftLeft(TranslatorVisitor& v, Imm<4> immh, Imm<3> immb, Vec Vn,
const IR::U128 operand = v.ir.ZeroExtendToQuad(v.V_scalar(esize, Vn)); const IR::U128 operand = v.ir.ZeroExtendToQuad(v.V_scalar(esize, Vn));
const IR::U128 shift = v.ir.ZeroExtendToQuad(v.I(esize, shift_amount)); const IR::U128 shift = v.ir.ZeroExtendToQuad(v.I(esize, shift_amount));
const IR::U128 result = [&v, esize, operand, shift, type] { const IR::U128 result = [&v, esize, operand, shift, type, shift_amount] {
if (type == SaturatingShiftLeftType::Signed) { if (type == SaturatingShiftLeftType::Signed) {
return v.ir.VectorSignedSaturatedShiftLeft(esize, operand, shift); return v.ir.VectorSignedSaturatedShiftLeft(esize, operand, shift);
} }
@ -56,7 +56,7 @@ bool SaturatingShiftLeft(TranslatorVisitor& v, Imm<4> immh, Imm<3> immb, Vec Vn,
return v.ir.VectorUnsignedSaturatedShiftLeft(esize, operand, shift); return v.ir.VectorUnsignedSaturatedShiftLeft(esize, operand, shift);
} }
return v.ir.VectorSignedSaturatedShiftLeftUnsigned(esize, operand, shift); return v.ir.VectorSignedSaturatedShiftLeftUnsigned(esize, operand, shift_amount);
}(); }();
v.ir.SetQ(Vd, result); v.ir.SetQ(Vd, result);

2
src/dynarmic/frontend/A64/translate/impl/simd_shift_by_immediate.cpp
View file

@ -182,7 +182,7 @@ bool SaturatingShiftLeft(TranslatorVisitor& v, bool Q, Imm<4> immh, Imm<3> immb,
return v.ir.VectorUnsignedSaturatedShiftLeft(esize, operand, shift_vec); return v.ir.VectorUnsignedSaturatedShiftLeft(esize, operand, shift_vec);
} }
return v.ir.VectorSignedSaturatedShiftLeftUnsigned(esize, operand, shift_vec); return v.ir.VectorSignedSaturatedShiftLeftUnsigned(esize, operand, shift);
}(); }();
v.V(datasize, Vd, result); v.V(datasize, Vd, result);

11
src/dynarmic/ir/ir_emitter.cpp
View file

@ -1858,16 +1858,17 @@ U128 IREmitter::VectorSignedSaturatedShiftLeft(size_t esize, const U128& a, cons
UNREACHABLE(); UNREACHABLE();
} }
U128 IREmitter::VectorSignedSaturatedShiftLeftUnsigned(size_t esize, const U128& a, const U128& b) { U128 IREmitter::VectorSignedSaturatedShiftLeftUnsigned(size_t esize, const U128& a, u8 shift_amount) {
ASSERT(shift_amount < esize);
switch (esize) { switch (esize) {
case 8: case 8:
return Inst<U128>(Opcode::VectorSignedSaturatedShiftLeftUnsigned8, a, b); return Inst<U128>(Opcode::VectorSignedSaturatedShiftLeftUnsigned8, a, Imm8(shift_amount));
case 16: case 16:
return Inst<U128>(Opcode::VectorSignedSaturatedShiftLeftUnsigned16, a, b); return Inst<U128>(Opcode::VectorSignedSaturatedShiftLeftUnsigned16, a, Imm8(shift_amount));
case 32: case 32:
return Inst<U128>(Opcode::VectorSignedSaturatedShiftLeftUnsigned32, a, b); return Inst<U128>(Opcode::VectorSignedSaturatedShiftLeftUnsigned32, a, Imm8(shift_amount));
case 64: case 64:
return Inst<U128>(Opcode::VectorSignedSaturatedShiftLeftUnsigned64, a, b); return Inst<U128>(Opcode::VectorSignedSaturatedShiftLeftUnsigned64, a, Imm8(shift_amount));
} }
UNREACHABLE(); UNREACHABLE();
} }

2
src/dynarmic/ir/ir_emitter.h
View file

@ -304,7 +304,7 @@ public:
U128 VectorSignedSaturatedNarrowToUnsigned(size_t original_esize, const U128& a); U128 VectorSignedSaturatedNarrowToUnsigned(size_t original_esize, const U128& a);
U128 VectorSignedSaturatedNeg(size_t esize, const U128& a); U128 VectorSignedSaturatedNeg(size_t esize, const U128& a);
U128 VectorSignedSaturatedShiftLeft(size_t esize, const U128& a, const U128& b); U128 VectorSignedSaturatedShiftLeft(size_t esize, const U128& a, const U128& b);
U128 VectorSignedSaturatedShiftLeftUnsigned(size_t esize, const U128& a, const U128& b); U128 VectorSignedSaturatedShiftLeftUnsigned(size_t esize, const U128& a, u8 shift_amount);
U128 VectorSub(size_t esize, const U128& a, const U128& b); U128 VectorSub(size_t esize, const U128& a, const U128& b);
Table VectorTable(std::vector<U64> values); Table VectorTable(std::vector<U64> values);
Table VectorTable(std::vector<U128> values); Table VectorTable(std::vector<U128> values);

8
src/dynarmic/ir/opcodes.inc
View file

@ -505,10 +505,10 @@ OPCODE(VectorSignedSaturatedShiftLeft8, U128, U128
OPCODE(VectorSignedSaturatedShiftLeft16, U128, U128, U128 ) OPCODE(VectorSignedSaturatedShiftLeft16, U128, U128, U128 )
OPCODE(VectorSignedSaturatedShiftLeft32, U128, U128, U128 ) OPCODE(VectorSignedSaturatedShiftLeft32, U128, U128, U128 )
OPCODE(VectorSignedSaturatedShiftLeft64, U128, U128, U128 ) OPCODE(VectorSignedSaturatedShiftLeft64, U128, U128, U128 )
OPCODE(VectorSignedSaturatedShiftLeftUnsigned8, U128, U128, U128 ) OPCODE(VectorSignedSaturatedShiftLeftUnsigned8, U128, U128, U8 )
OPCODE(VectorSignedSaturatedShiftLeftUnsigned16, U128, U128, U128 ) OPCODE(VectorSignedSaturatedShiftLeftUnsigned16, U128, U128, U8 )
OPCODE(VectorSignedSaturatedShiftLeftUnsigned32, U128, U128, U128 ) OPCODE(VectorSignedSaturatedShiftLeftUnsigned32, U128, U128, U8 )
OPCODE(VectorSignedSaturatedShiftLeftUnsigned64, U128, U128, U128 ) OPCODE(VectorSignedSaturatedShiftLeftUnsigned64, U128, U128, U8 )
OPCODE(VectorSub8, U128, U128, U128 ) OPCODE(VectorSub8, U128, U128, U128 )
OPCODE(VectorSub16, U128, U128, U128 ) OPCODE(VectorSub16, U128, U128, U128 )
OPCODE(VectorSub32, U128, U128, U128 ) OPCODE(VectorSub32, U128, U128, U128 )