backend/arm64: Add InvalidateCacheRanges
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165621a872
commit
082167feeb
13 changed files with 69 additions and 28 deletions
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@ -1,6 +1,8 @@
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include(TargetArchitectureSpecificSources)
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add_library(dynarmic
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backend/block_range_information.cpp
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backend/block_range_information.h
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backend/exception_handler.h
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common/always_false.h
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common/cast_util.h
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@ -271,8 +273,6 @@ if ("x86_64" IN_LIST ARCHITECTURE)
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backend/x64/abi.h
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backend/x64/block_of_code.cpp
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backend/x64/block_of_code.h
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backend/x64/block_range_information.cpp
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backend/x64/block_range_information.h
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backend/x64/callback.cpp
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backend/x64/callback.h
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backend/x64/constant_pool.cpp
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@ -181,6 +181,10 @@ IR::Block A32AddressSpace::GenerateIR(IR::LocationDescriptor descriptor) const {
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return ir_block;
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}
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void A32AddressSpace::InvalidateCacheRanges(const boost::icl::interval_set<u32>& ranges) {
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InvalidateBasicBlocks(block_ranges.InvalidateRanges(ranges));
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}
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void A32AddressSpace::EmitPrelude() {
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using namespace oaknut::util;
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@ -392,4 +396,11 @@ EmitConfig A32AddressSpace::GetEmitConfig() {
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};
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}
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void A32AddressSpace::RegisterNewBasicBlock(const IR::Block& block, const EmittedBlockInfo&) {
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const A32::LocationDescriptor descriptor{block.Location()};
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const A32::LocationDescriptor end_location{block.EndLocation()};
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const auto range = boost::icl::discrete_interval<u32>::closed(descriptor.PC(), end_location.PC() - 1);
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block_ranges.AddRange(range, descriptor);
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}
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} // namespace Dynarmic::Backend::Arm64
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@ -6,23 +6,30 @@
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#pragma once
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#include "dynarmic/backend/arm64/address_space.h"
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#include "dynarmic/backend/block_range_information.h"
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#include "dynarmic/interface/A32/config.h"
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namespace Dynarmic::Backend::Arm64 {
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struct EmittedBlockInfo;
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class A32AddressSpace final : public AddressSpace {
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public:
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explicit A32AddressSpace(const A32::UserConfig& conf);
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IR::Block GenerateIR(IR::LocationDescriptor) const override;
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void InvalidateCacheRanges(const boost::icl::interval_set<u32>& ranges);
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protected:
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friend class A32Core;
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void EmitPrelude();
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EmitConfig GetEmitConfig() override;
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void RegisterNewBasicBlock(const IR::Block& block, const EmittedBlockInfo& block_info) override;
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const A32::UserConfig conf;
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BlockRangeInformation<u32> block_ranges;
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};
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} // namespace Dynarmic::Backend::Arm64
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@ -209,8 +209,7 @@ private:
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}
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if (!invalid_cache_ranges.empty()) {
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// TODO: Optimize
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current_address_space.ClearCache();
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current_address_space.InvalidateCacheRanges(invalid_cache_ranges);
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invalid_cache_ranges.clear();
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return;
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@ -350,6 +350,10 @@ IR::Block A64AddressSpace::GenerateIR(IR::LocationDescriptor descriptor) const {
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return ir_block;
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}
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void A64AddressSpace::InvalidateCacheRanges(const boost::icl::interval_set<u64>& ranges) {
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InvalidateBasicBlocks(block_ranges.InvalidateRanges(ranges));
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}
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void A64AddressSpace::EmitPrelude() {
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using namespace oaknut::util;
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@ -568,4 +572,11 @@ EmitConfig A64AddressSpace::GetEmitConfig() {
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};
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}
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void A64AddressSpace::RegisterNewBasicBlock(const IR::Block& block, const EmittedBlockInfo&) {
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const A64::LocationDescriptor descriptor{block.Location()};
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const A64::LocationDescriptor end_location{block.EndLocation()};
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const auto range = boost::icl::discrete_interval<u64>::closed(descriptor.PC(), end_location.PC() - 1);
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block_ranges.AddRange(range, descriptor);
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}
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} // namespace Dynarmic::Backend::Arm64
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@ -6,23 +6,30 @@
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#pragma once
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#include "dynarmic/backend/arm64/address_space.h"
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#include "dynarmic/backend/block_range_information.h"
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#include "dynarmic/interface/A64/config.h"
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namespace Dynarmic::Backend::Arm64 {
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struct EmittedBlockInfo;
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class A64AddressSpace final : public AddressSpace {
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public:
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explicit A64AddressSpace(const A64::UserConfig& conf);
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IR::Block GenerateIR(IR::LocationDescriptor) const override;
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void InvalidateCacheRanges(const boost::icl::interval_set<u64>& ranges);
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protected:
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friend class A64Core;
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void EmitPrelude();
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EmitConfig GetEmitConfig() override;
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void RegisterNewBasicBlock(const IR::Block& block, const EmittedBlockInfo& block_info) override;
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const A64::UserConfig conf;
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BlockRangeInformation<u64> block_ranges;
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};
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} // namespace Dynarmic::Backend::Arm64
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@ -30,7 +30,7 @@ struct Jit::Impl final {
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HaltReason Run() {
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ASSERT(!is_executing);
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PerformRequestedCacheInvalidation();
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PerformRequestedCacheInvalidation(static_cast<HaltReason>(Atomic::Load(&halt_reason)));
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is_executing = true;
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SCOPE_EXIT {
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@ -39,14 +39,14 @@ struct Jit::Impl final {
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HaltReason hr = core.Run(current_address_space, current_state, &halt_reason);
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PerformRequestedCacheInvalidation();
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PerformRequestedCacheInvalidation(hr);
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return hr;
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}
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HaltReason Step() {
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ASSERT(!is_executing);
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PerformRequestedCacheInvalidation();
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PerformRequestedCacheInvalidation(static_cast<HaltReason>(Atomic::Load(&halt_reason)));
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is_executing = true;
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SCOPE_EXIT {
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@ -55,7 +55,7 @@ struct Jit::Impl final {
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HaltReason hr = core.Step(current_address_space, current_state, &halt_reason);
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PerformRequestedCacheInvalidation();
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PerformRequestedCacheInvalidation(hr);
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return hr;
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}
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@ -157,7 +157,10 @@ struct Jit::Impl final {
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}
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private:
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void PerformRequestedCacheInvalidation() {
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void PerformRequestedCacheInvalidation(HaltReason hr) {
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if (Has(hr, HaltReason::CacheInvalidation)) {
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std::unique_lock lock{invalidation_mutex};
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ClearHalt(HaltReason::CacheInvalidation);
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if (invalidate_entire_cache) {
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@ -169,13 +172,13 @@ private:
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}
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if (!invalid_cache_ranges.empty()) {
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// TODO: Optimize
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current_address_space.ClearCache();
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current_address_space.InvalidateCacheRanges(invalid_cache_ranges);
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invalid_cache_ranges.clear();
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return;
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}
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}
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}
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A64::UserConfig conf;
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A64JitState current_state{};
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@ -115,6 +115,8 @@ EmittedBlockInfo AddressSpace::Emit(IR::Block block) {
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mem.invalidate(reinterpret_cast<u32*>(block_info.entry_point), block_info.size);
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mem.protect();
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RegisterNewBasicBlock(block, block_info);
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return block_info;
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}
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@ -45,6 +45,7 @@ public:
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protected:
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virtual EmitConfig GetEmitConfig() = 0;
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virtual void RegisterNewBasicBlock(const IR::Block& block, const EmittedBlockInfo& block_info) = 0;
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size_t GetRemainingSize();
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EmittedBlockInfo Emit(IR::Block ir_block);
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@ -3,14 +3,14 @@
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* SPDX-License-Identifier: 0BSD
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*/
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#include "dynarmic/backend/x64/block_range_information.h"
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#include "dynarmic/backend/block_range_information.h"
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#include <boost/icl/interval_map.hpp>
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#include <boost/icl/interval_set.hpp>
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#include <mcl/stdint.hpp>
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#include <tsl/robin_set.h>
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namespace Dynarmic::Backend::X64 {
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namespace Dynarmic::Backend {
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template<typename ProgramCounterType>
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void BlockRangeInformation<ProgramCounterType>::AddRange(boost::icl::discrete_interval<ProgramCounterType> range, IR::LocationDescriptor location) {
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@ -40,4 +40,4 @@ tsl::robin_set<IR::LocationDescriptor> BlockRangeInformation<ProgramCounterType>
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template class BlockRangeInformation<u32>;
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template class BlockRangeInformation<u64>;
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} // namespace Dynarmic::Backend::X64
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} // namespace Dynarmic::Backend
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@ -13,7 +13,7 @@
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#include "dynarmic/ir/location_descriptor.h"
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namespace Dynarmic::Backend::X64 {
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namespace Dynarmic::Backend {
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template<typename ProgramCounterType>
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class BlockRangeInformation {
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boost::icl::interval_map<ProgramCounterType, std::set<IR::LocationDescriptor>> block_ranges;
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};
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} // namespace Dynarmic::Backend::X64
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} // namespace Dynarmic::Backend
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@ -12,8 +12,8 @@
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#include <tsl/robin_map.h>
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#include "dynarmic/backend/block_range_information.h"
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#include "dynarmic/backend/x64/a32_jitstate.h"
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#include "dynarmic/backend/x64/block_range_information.h"
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#include "dynarmic/backend/x64/emit_x64.h"
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#include "dynarmic/frontend/A32/a32_location_descriptor.h"
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#include "dynarmic/interface/A32/a32.h"
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@ -10,8 +10,8 @@
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#include <optional>
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#include <tuple>
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#include "dynarmic/backend/block_range_information.h"
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#include "dynarmic/backend/x64/a64_jitstate.h"
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#include "dynarmic/backend/x64/block_range_information.h"
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#include "dynarmic/backend/x64/emit_x64.h"
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#include "dynarmic/frontend/A64/a64_location_descriptor.h"
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#include "dynarmic/interface/A64/a64.h"
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