asimd: Prevent misdecodes from occurring
Pointed out by Mary when reviewing the shift code.
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2 changed files with 14 additions and 3 deletions
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@ -8,6 +8,7 @@
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#include <algorithm>
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#include <functional>
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#include <optional>
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#include <set>
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#include <vector>
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#include "common/bit_util.h"
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@ -35,6 +36,15 @@ std::vector<ASIMDMatcher<V>> GetASIMDDecodeTable() {
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return Common::BitCount(matcher1.GetMask()) > Common::BitCount(matcher2.GetMask());
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});
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// Exceptions to the above rule of thumb.
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const std::set<std::string> comes_first{
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"VBIC, VMOV, VMVN, VORR (immediate)"
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};
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std::stable_partition(table.begin(), table.end(), [&](const auto& matcher) {
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return comes_first.count(matcher.GetName()) > 0;
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});
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return table;
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}
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@ -3,6 +3,7 @@
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* SPDX-License-Identifier: 0BSD
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*/
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#include "common/assert.h"
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#include "common/bit_util.h"
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#include "frontend/A32/translate/impl/translate_arm.h"
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@ -53,7 +54,7 @@ bool ShiftRight(ArmTranslatorVisitor& v, bool U, bool D, size_t imm6, size_t Vd,
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// Technically just a related encoding (One register and modified immediate instructions)
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if (!L && Common::Bits<3, 5>(imm6) == 0) {
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return v.UndefinedInstruction();
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ASSERT_FALSE();
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}
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const auto [esize, shift_amount] = ElementSizeAndShiftAmount(true, L, imm6);
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@ -106,7 +107,7 @@ bool ArmTranslatorVisitor::asimd_VSRI(bool D, size_t imm6, size_t Vd, bool L, bo
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// Technically just a related encoding (One register and modified immediate instructions)
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if (!L && Common::Bits<3, 5>(imm6) == 0) {
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return UndefinedInstruction();
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ASSERT_FALSE();
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}
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const auto [esize, shift_amount] = ElementSizeAndShiftAmount(true, L, imm6);
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@ -160,7 +161,7 @@ bool ArmTranslatorVisitor::asimd_VSHL(bool D, size_t imm6, size_t Vd, bool L, bo
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// Technically just a related encoding (One register and modified immediate instructions)
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if (!L && Common::Bits<3, 5>(imm6) == 0) {
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return UndefinedInstruction();
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ASSERT_FALSE();
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}
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const auto [esize, shift_amount] = ElementSizeAndShiftAmount(false, L, imm6);
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