89 lines
3.1 KiB
C++
89 lines
3.1 KiB
C++
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#pragma once
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#include <cstdint>
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// Source file for anything specific to the RISC-V vector extension.
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namespace biscuit {
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/// Describes whether or not an instruction should make use of the mask vector.
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enum class VecMask : uint32_t {
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Yes = 0,
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No = 1,
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};
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/// Describes the selected element width.
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enum class SEW : uint32_t {
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E8 = 0b000, // 8-bit vector elements
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E16 = 0b001, // 16-bit vector elements
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E32 = 0b010, // 32-bit vector elements
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E64 = 0b011, // 64-bit vector elements
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E128 = 0b100, // 128-bit vector elements
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E256 = 0b101, // 256-bit vector elements
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E512 = 0b110, // 512-bit vector elements
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E1024 = 0b111, // 1024-bit vector elements
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};
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/// Describes the selected register group multiplier.
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enum class LMUL : uint32_t {
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M1 = 0b000, // Group of one vector
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M2 = 0b001, // Groups of two vectors
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M4 = 0b010, // Groups of four vectors
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M8 = 0b011, // Groups of eight vectors
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MF8 = 0b101, // Fractional vector group (1/8)
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MF4 = 0b110, // Fractional vector group (1/4)
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MF2 = 0b111, // Fractional vector group (1/2)
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};
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/**
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* Describes whether or not vector masks are agnostic.
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*
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* From the RVV spec:
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*
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* When a set is marked undisturbed, the corresponding set of
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* destination elements in a vector register group retain the
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* value they previously held.
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*
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* When a set is marked agnostic, the corresponding set of destination
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* elements in any vector destination operand can either retain the value
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* they previously held, or are overwritten with 1s.
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*
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* Within a single vector instruction, each destination element can be either
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* left undisturbed or overwritten with 1s, in any combination, and the pattern
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* of undisturbed or overwritten with 1s is not required to be deterministic when
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* the instruction is executed with the same inputs. In addition, except for
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* mask load instructions, any element in the tail of a mask result can also be
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* written with the value the mask-producing operation would have calculated with vl=VLMAX
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*/
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enum class VMA : uint32_t {
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No, // Undisturbed
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Yes, // Agnostic
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};
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/**
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* Describes whether or not vector tail elements are agnostic.
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*
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* From the RVV spec:
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*
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* When a set is marked undisturbed, the corresponding set of
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* destination elements in a vector register group retain the
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* value they previously held.
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*
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* When a set is marked agnostic, the corresponding set of destination
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* elements in any vector destination operand can either retain the value
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* they previously held, or are overwritten with 1s.
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*
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* Within a single vector instruction, each destination element can be either
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* left undisturbed or overwritten with 1s, in any combination, and the pattern
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* of undisturbed or overwritten with 1s is not required to be deterministic when
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* the instruction is executed with the same inputs. In addition, except for
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* mask load instructions, any element in the tail of a mask result can also be
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* written with the value the mask-producing operation would have calculated with vl=VLMAX
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*/
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enum class VTA : uint32_t {
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No, // Undisturbed
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Yes, // Agnostic
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};
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} // namespace biscuit
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