dynarmic/tests/arm/test_thumb_instructions.cpp

177 lines
5 KiB
C++
Raw Normal View History

2016-07-01 15:01:06 +02:00
/* This file is part of the dynarmic project.
* Copyright (c) 2016 MerryMage
* This software may be used and distributed according to the terms of the GNU
* General Public License version 2 or any later version.
*/
#include <catch.hpp>
2016-08-25 19:22:08 +02:00
#include <dynarmic/dynarmic.h>
2016-07-01 15:01:06 +02:00
#include "common/common_types.h"
2016-07-07 11:53:09 +02:00
#include "skyeye_interpreter/dyncom/arm_dyncom_interpreter.h"
#include "skyeye_interpreter/skyeye_common/armstate.h"
2016-07-01 15:01:06 +02:00
2016-07-07 13:01:47 +02:00
static std::array<u16, 1024> code_mem{};
2016-07-07 11:53:09 +02:00
2016-07-07 13:01:47 +02:00
static u32 MemoryRead32(u32 vaddr);
static u32 MemoryReadCode(u32 vaddr);
static void InterpreterFallback(u32 pc, Dynarmic::Jit* jit, void*);
2016-07-07 13:01:47 +02:00
static Dynarmic::UserCallbacks GetUserCallbacks();
2016-07-01 15:01:06 +02:00
2016-07-07 13:01:47 +02:00
static u32 MemoryRead32(u32 vaddr) {
return vaddr;
}
static u32 MemoryReadCode(u32 vaddr) {
2016-07-07 11:53:09 +02:00
if (vaddr < code_mem.size() * sizeof(u16)) {
size_t index = vaddr / sizeof(u16);
return code_mem[index] | (code_mem[index+1] << 16);
}
return 0xE7FEE7FE; //b +#0, b +#0
}
2016-07-01 15:01:06 +02:00
static void InterpreterFallback(u32 pc, Dynarmic::Jit* jit, void*) {
2016-07-07 11:53:09 +02:00
ARMul_State interp_state{USER32MODE};
interp_state.user_callbacks = GetUserCallbacks();
interp_state.NumInstrsToExecute = 1;
interp_state.Reg = jit->Regs();
interp_state.Cpsr = jit->Cpsr();
interp_state.Reg[15] = pc;
InterpreterClearCache();
InterpreterMainLoop(&interp_state);
jit->Regs() = interp_state.Reg;
jit->Cpsr() = interp_state.Cpsr;
}
2016-07-07 13:01:47 +02:00
static Dynarmic::UserCallbacks GetUserCallbacks() {
Dynarmic::UserCallbacks user_callbacks{};
user_callbacks.MemoryRead32 = &MemoryRead32;
user_callbacks.MemoryReadCode = &MemoryReadCode;
2016-07-07 11:53:09 +02:00
user_callbacks.InterpreterFallback = &InterpreterFallback;
return user_callbacks;
2016-07-01 15:01:06 +02:00
}
TEST_CASE( "thumb: lsls r0, r1, #2", "[thumb]" ) {
Dynarmic::Jit jit{GetUserCallbacks()};
code_mem.fill({});
code_mem[0] = 0x0088; // lsls r0, r1, #2
2016-07-07 11:53:09 +02:00
code_mem[1] = 0xE7FE; // b +#0
jit.Regs()[0] = 1;
jit.Regs()[1] = 2;
jit.Regs()[15] = 0; // PC = 0
jit.Cpsr() = 0x00000030; // Thumb, User-mode
2016-07-01 15:01:06 +02:00
jit.Run(1);
2016-07-01 15:01:06 +02:00
REQUIRE( jit.Regs()[0] == 8 );
REQUIRE( jit.Regs()[1] == 2 );
2016-07-07 11:53:09 +02:00
REQUIRE( jit.Regs()[15] == 2 );
REQUIRE( jit.Cpsr() == 0x00000030 );
2016-07-01 15:01:06 +02:00
}
TEST_CASE( "thumb: lsls r0, r1, #31", "[thumb]" ) {
Dynarmic::Jit jit{GetUserCallbacks()};
code_mem.fill({});
code_mem[0] = 0x07C8; // lsls r0, r1, #31
2016-07-07 11:53:09 +02:00
code_mem[1] = 0xE7FE; // b +#0
jit.Regs()[0] = 1;
jit.Regs()[1] = 0xFFFFFFFF;
jit.Regs()[15] = 0; // PC = 0
jit.Cpsr() = 0x00000030; // Thumb, User-mode
2016-07-01 15:01:06 +02:00
jit.Run(1);
2016-07-01 15:01:06 +02:00
REQUIRE( jit.Regs()[0] == 0x80000000 );
REQUIRE( jit.Regs()[1] == 0xffffffff );
2016-07-07 11:53:09 +02:00
REQUIRE( jit.Regs()[15] == 2 );
2016-07-07 15:51:47 +02:00
REQUIRE( jit.Cpsr() == 0xA0000030 ); // N, C flags, Thumb, User-mode
2016-07-01 15:01:06 +02:00
}
2016-07-16 20:22:57 +02:00
TEST_CASE( "thumb: revsh r4, r3", "[thumb]" ) {
Dynarmic::Jit jit{GetUserCallbacks()};
code_mem.fill({});
code_mem[0] = 0xBADC; // revsh r4, r3
code_mem[1] = 0xE7FE; // b +#0
jit.Regs()[3] = 0x12345678;
jit.Regs()[15] = 0; // PC = 0
jit.Cpsr() = 0x00000030; // Thumb, User-mode
jit.Run(1);
REQUIRE( jit.Regs()[3] == 0x12345678 );
REQUIRE( jit.Regs()[4] == 0x00007856 );
REQUIRE( jit.Regs()[15] == 2 );
REQUIRE( jit.Cpsr() == 0x00000030 ); // Thumb, User-mode
}
2016-07-18 16:11:16 +02:00
TEST_CASE( "thumb: ldr r3, [r3, #28]", "[thumb]" ) {
Dynarmic::Jit jit{GetUserCallbacks()};
code_mem.fill({});
code_mem[0] = 0x69DB; // ldr r3, [r3, #28]
code_mem[1] = 0xE7FE; // b +#0
jit.Regs()[3] = 0x12345678;
jit.Regs()[15] = 0; // PC = 0
jit.Cpsr() = 0x00000030; // Thumb, User-mode
jit.Run(1);
REQUIRE( jit.Regs()[3] == 0x12345694 );
REQUIRE( jit.Regs()[15] == 2 );
REQUIRE( jit.Cpsr() == 0x00000030 ); // Thumb, User-mode
}
TEST_CASE( "thumb: blx +#67712", "[thumb]" ) {
Dynarmic::Jit jit{GetUserCallbacks()};
code_mem.fill({});
code_mem[0] = 0xF010; code_mem[1] = 0xEC3E; // blx +#67712
code_mem[2] = 0xE7FE; // b +#0
jit.Regs()[15] = 0; // PC = 0
jit.Cpsr() = 0x00000030; // Thumb, User-mode
jit.Run(1);
REQUIRE( jit.Regs()[14] == (0x4 | 1) );
REQUIRE( jit.Regs()[15] == 0x10880 );
REQUIRE( jit.Cpsr() == 0x00000010 ); // User-mode
}
TEST_CASE( "thumb: bl +#234584", "[thumb]" ) {
Dynarmic::Jit jit{GetUserCallbacks()};
code_mem.fill({});
code_mem[0] = 0xF039; code_mem[1] = 0xFA2A; // bl +#234584
code_mem[2] = 0xE7FE; // b +#0
jit.Regs()[15] = 0; // PC = 0
jit.Cpsr() = 0x00000030; // Thumb, User-mode
jit.Run(1);
REQUIRE( jit.Regs()[14] == (0x4 | 1) );
REQUIRE( jit.Regs()[15] == 0x39458 );
REQUIRE( jit.Cpsr() == 0x00000030 ); // Thumb, User-mode
}
TEST_CASE( "thumb: bl -#42", "[thumb]" ) {
Dynarmic::Jit jit{GetUserCallbacks()};
code_mem.fill({});
code_mem[0] = 0xF7FF; code_mem[1] = 0xFFE9; // bl -#42
code_mem[2] = 0xE7FE; // b +#0
jit.Regs()[15] = 0; // PC = 0
jit.Cpsr() = 0x00000030; // Thumb, User-mode
jit.Run(1);
REQUIRE( jit.Regs()[14] == (0x4 | 1) );
REQUIRE( jit.Regs()[15] == 0xFFFFFFD6 );
REQUIRE( jit.Cpsr() == 0x00000030 ); // Thumb, User-mode
}