2016-07-01 15:01:06 +02:00
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/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#pragma once
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2016-07-04 11:22:11 +02:00
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#include "frontend/arm_types.h"
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#include "frontend/ir/ir.h"
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#include "frontend/ir/opcodes.h"
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2016-07-01 15:01:06 +02:00
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namespace Dynarmic {
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namespace Arm {
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class IREmitter {
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public:
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2016-07-04 15:37:50 +02:00
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explicit IREmitter(LocationDescriptor descriptor) : block(descriptor), current_location(descriptor) {}
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IR::Block block;
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LocationDescriptor current_location;
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2016-07-01 15:01:06 +02:00
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struct ResultAndCarry {
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2016-07-23 00:55:00 +02:00
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IR::Value result;
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IR::Value carry;
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2016-07-01 15:01:06 +02:00
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};
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2016-07-08 11:09:18 +02:00
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struct ResultAndCarryAndOverflow {
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2016-07-23 00:55:00 +02:00
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IR::Value result;
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IR::Value carry;
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IR::Value overflow;
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2016-07-08 11:09:18 +02:00
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};
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2016-07-01 15:01:06 +02:00
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void Unimplemented();
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2016-07-11 23:43:53 +02:00
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u32 PC();
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u32 AlignPC(size_t alignment);
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2016-07-01 15:01:06 +02:00
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2016-07-23 00:55:00 +02:00
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IR::Value Imm1(bool value);
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IR::Value Imm8(u8 value);
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IR::Value Imm32(u32 value);
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IR::Value GetRegister(Reg source_reg);
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2016-08-05 19:54:19 +02:00
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IR::Value GetExtendedRegister(ExtReg source_reg);
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2016-07-23 00:55:00 +02:00
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void SetRegister(const Reg dest_reg, const IR::Value& value);
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2016-08-05 19:54:19 +02:00
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void SetExtendedRegister(const ExtReg dest_reg, const IR::Value& value);
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2016-07-23 00:55:00 +02:00
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void ALUWritePC(const IR::Value& value);
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void BranchWritePC(const IR::Value& value);
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void BXWritePC(const IR::Value& value);
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void LoadWritePC(const IR::Value& value);
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void CallSupervisor(const IR::Value& value);
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IR::Value GetCFlag();
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void SetNFlag(const IR::Value& value);
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void SetZFlag(const IR::Value& value);
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void SetCFlag(const IR::Value& value);
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void SetVFlag(const IR::Value& value);
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2016-08-04 23:04:42 +02:00
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IR::Value Pack2x32To1x64(const IR::Value& lo, const IR::Value& hi);
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IR::Value LeastSignificantWord(const IR::Value& value);
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2016-08-06 22:03:57 +02:00
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ResultAndCarry MostSignificantWord(const IR::Value& value);
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2016-07-23 00:55:00 +02:00
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IR::Value LeastSignificantHalf(const IR::Value& value);
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IR::Value LeastSignificantByte(const IR::Value& value);
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IR::Value MostSignificantBit(const IR::Value& value);
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IR::Value IsZero(const IR::Value& value);
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2016-08-04 23:04:42 +02:00
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IR::Value IsZero64(const IR::Value& value);
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2016-07-23 00:55:00 +02:00
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ResultAndCarry LogicalShiftLeft(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in);
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ResultAndCarry LogicalShiftRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in);
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ResultAndCarry ArithmeticShiftRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in);
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ResultAndCarry RotateRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in);
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2016-07-31 20:07:35 +02:00
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ResultAndCarry RotateRightExtended(const IR::Value& value_in, const IR::Value& carry_in);
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2016-07-23 00:55:00 +02:00
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ResultAndCarryAndOverflow AddWithCarry(const IR::Value& a, const IR::Value& b, const IR::Value& carry_in);
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IR::Value Add(const IR::Value& a, const IR::Value& b);
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2016-08-04 23:04:42 +02:00
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IR::Value Add64(const IR::Value& a, const IR::Value& b);
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2016-07-23 00:55:00 +02:00
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ResultAndCarryAndOverflow SubWithCarry(const IR::Value& a, const IR::Value& b, const IR::Value& carry_in);
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IR::Value Sub(const IR::Value& a, const IR::Value& b);
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2016-08-06 07:09:47 +02:00
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IR::Value Sub64(const IR::Value& a, const IR::Value& b);
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2016-08-04 23:04:42 +02:00
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IR::Value Mul(const IR::Value& a, const IR::Value& b);
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IR::Value Mul64(const IR::Value& a, const IR::Value& b);
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2016-07-23 00:55:00 +02:00
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IR::Value And(const IR::Value& a, const IR::Value& b);
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IR::Value Eor(const IR::Value& a, const IR::Value& b);
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IR::Value Or(const IR::Value& a, const IR::Value& b);
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IR::Value Not(const IR::Value& a);
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2016-08-04 23:04:42 +02:00
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IR::Value SignExtendWordToLong(const IR::Value& a);
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2016-07-23 00:55:00 +02:00
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IR::Value SignExtendHalfToWord(const IR::Value& a);
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IR::Value SignExtendByteToWord(const IR::Value& a);
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2016-08-04 23:04:42 +02:00
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IR::Value ZeroExtendWordToLong(const IR::Value& a);
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2016-07-23 00:55:00 +02:00
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IR::Value ZeroExtendHalfToWord(const IR::Value& a);
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IR::Value ZeroExtendByteToWord(const IR::Value& a);
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IR::Value ByteReverseWord(const IR::Value& a);
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IR::Value ByteReverseHalf(const IR::Value& a);
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IR::Value ByteReverseDual(const IR::Value& a);
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2016-08-07 02:27:18 +02:00
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IR::Value FPAbs32(const IR::Value& a);
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IR::Value FPAbs64(const IR::Value& a);
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2016-08-06 18:21:29 +02:00
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IR::Value FPAdd32(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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IR::Value FPAdd64(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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2016-08-07 11:21:14 +02:00
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IR::Value FPMul32(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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IR::Value FPMul64(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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2016-08-07 02:41:25 +02:00
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IR::Value FPSub32(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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IR::Value FPSub64(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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2016-08-06 18:21:29 +02:00
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2016-07-23 00:55:00 +02:00
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IR::Value ReadMemory8(const IR::Value& vaddr);
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IR::Value ReadMemory16(const IR::Value& vaddr);
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IR::Value ReadMemory32(const IR::Value& vaddr);
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IR::Value ReadMemory64(const IR::Value& vaddr);
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void WriteMemory8(const IR::Value& vaddr, const IR::Value& value);
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void WriteMemory16(const IR::Value& vaddr, const IR::Value& value);
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void WriteMemory32(const IR::Value& vaddr, const IR::Value& value);
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void WriteMemory64(const IR::Value& vaddr, const IR::Value& value);
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2016-07-11 23:43:53 +02:00
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2016-08-05 15:07:27 +02:00
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void Breakpoint();
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2016-07-07 11:53:09 +02:00
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void SetTerm(const IR::Terminal& terminal);
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2016-07-01 15:01:06 +02:00
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private:
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2016-07-23 00:55:00 +02:00
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IR::Value Inst(IR::Opcode op, std::initializer_list<IR::Value> args);
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2016-07-01 15:01:06 +02:00
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};
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} // namespace Arm
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} // namespace Dynarmic
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