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Add Arm64 support to dumpsyms.

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Adds Arm64 support to dumpsyms, enabling support for EM_AARCH64 elf type and
arm64 registers in DwarfCFIToModule.

BUG=367367,335641,354405
R=mark@chromium.org

Review URL: https://breakpad.appspot.com/1654002

git-svn-id: http://google-breakpad.googlecode.com/svn/trunk@1322 4c0a9323-5329-0410-9bdc-e9ce6186880e
This commit is contained in:
rmcilroy@chromium.org 2014-04-29 09:45:46 +00:00
parent 4463365304
commit c2f9501755
4 changed files with 42 additions and 3 deletions
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20
src/common/dwarf_cfi_to_module.cc
View file

@ -105,6 +105,26 @@ vector<string> DwarfCFIToModule::RegisterNames::ARM() {
return MakeVector(names, sizeof(names) / sizeof(names[0]));
}
// Per ARM IHI 0057A, section 3.1
vector<string> DwarfCFIToModule::RegisterNames::ARM64() {
static const char *const names[] = {
"x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
"x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
"x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
"x24", "x25", "x26", "x27", "x28", "x29", "x30", "sp",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
"v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
"v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
"v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31"
};
return MakeVector(names, sizeof(names) / sizeof(names[0]));
}
vector<string> DwarfCFIToModule::RegisterNames::MIPS() {
static const char* const kRegisterNames[] = {
"$zero", "$at", "$v0", "$v1", "$a0", "$a1", "$a2", "$a3",

3
src/common/dwarf_cfi_to_module.h
View file

@ -109,6 +109,9 @@ class DwarfCFIToModule: public CallFrameInfo::Handler {
// ARM.
static vector<string> ARM();
// ARM64, aka AARCH64.
static vector<string> ARM64();
// MIPS.
static vector<string> MIPS();

9
src/common/linux/dump_symbols.cc
View file

@ -90,6 +90,11 @@ using google_breakpad::StabsToModule;
#endif
using google_breakpad::scoped_ptr;
// Define AARCH64 ELF architecture if host machine does not include this define.
#ifndef EM_AARCH64
#define EM_AARCH64 183
#endif
//
// FDWrapper
//
@ -293,6 +298,9 @@ bool DwarfCFIRegisterNames(const typename ElfClass::Ehdr* elf_header,
case EM_ARM:
*register_names = DwarfCFIToModule::RegisterNames::ARM();
return true;
case EM_AARCH64:
*register_names = DwarfCFIToModule::RegisterNames::ARM64();
return true;
case EM_MIPS:
*register_names = DwarfCFIToModule::RegisterNames::MIPS();
return true;
@ -754,6 +762,7 @@ const char* ElfArchitecture(const typename ElfClass::Ehdr* elf_header) {
switch (arch) {
case EM_386: return "x86";
case EM_ARM: return "arm";
case EM_AARCH64: return "arm64";
case EM_MIPS: return "mips";
case EM_PPC64: return "ppc64";
case EM_PPC: return "ppc";

7
src/common/mac/dump_syms.mm
View file

@ -62,6 +62,10 @@
#define CPU_TYPE_ARM (static_cast<cpu_type_t>(12))
#endif // CPU_TYPE_ARM
#ifndef CPU_TYPE_ARM64
#define CPU_TYPE_ARM64 (static_cast<cpu_type_t>(16777228))
#endif // CPU_TYPE_ARM64
using dwarf2reader::ByteReader;
using google_breakpad::DwarfCUToModule;
using google_breakpad::DwarfLineToModule;
@ -329,6 +333,9 @@ bool DumpSymbols::ReadCFI(google_breakpad::Module *module,
case CPU_TYPE_ARM:
register_names = DwarfCFIToModule::RegisterNames::ARM();
break;
case CPU_TYPE_ARM64:
register_names = DwarfCFIToModule::RegisterNames::ARM64();
break;
default: {
const NXArchInfo *arch = google_breakpad::BreakpadGetArchInfoFromCpuType(
macho_reader.cpu_type(), macho_reader.cpu_subtype());