mirror of
https://github.com/sudachi-emu/dynarmic.git
synced 2024-12-05 03:38:30 +01:00
343 lines
12 KiB
C++
343 lines
12 KiB
C++
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/* This file is part of the dynarmic project.
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* Copyright (c) 2018 MerryMage
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* SPDX-License-Identifier: 0BSD
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*/
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#include <algorithm>
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#include <cctype>
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#include <cstdlib>
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#include <cstring>
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#include <iostream>
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#include <map>
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#include <optional>
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#include <string>
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#include <fmt/format.h>
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#include <fmt/ostream.h>
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#include <mcl/bit/swap.hpp>
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#include <mcl/stdint.hpp>
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#include "dynarmic/common/llvm_disassemble.h"
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#include "dynarmic/frontend/A32/a32_location_descriptor.h"
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#include "dynarmic/frontend/A32/decoder/arm.h"
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#include "dynarmic/frontend/A32/decoder/asimd.h"
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#include "dynarmic/frontend/A32/decoder/vfp.h"
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#include "dynarmic/frontend/A32/translate/a32_translate.h"
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#include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h"
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#include "dynarmic/frontend/A64/a64_location_descriptor.h"
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#include "dynarmic/frontend/A64/decoder/a64.h"
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#include "dynarmic/frontend/A64/translate/a64_translate.h"
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#include "dynarmic/frontend/A64/translate/impl/impl.h"
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#include "dynarmic/interface/A32/a32.h"
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#include "dynarmic/interface/A32/disassembler.h"
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#include "dynarmic/ir/basic_block.h"
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#include "dynarmic/ir/opt/passes.h"
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using namespace Dynarmic;
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const char* GetNameOfA32Instruction(u32 instruction) {
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if (auto vfp_decoder = A32::DecodeVFP<A32::TranslatorVisitor>(instruction)) {
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return vfp_decoder->get().GetName();
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} else if (auto asimd_decoder = A32::DecodeASIMD<A32::TranslatorVisitor>(instruction)) {
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return asimd_decoder->get().GetName();
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} else if (auto decoder = A32::DecodeArm<A32::TranslatorVisitor>(instruction)) {
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return decoder->get().GetName();
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}
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return "<null>";
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}
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const char* GetNameOfA64Instruction(u32 instruction) {
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if (auto decoder = A64::Decode<A64::TranslatorVisitor>(instruction)) {
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return decoder->get().GetName();
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}
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return "<null>";
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}
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void PrintA32Instruction(u32 instruction) {
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fmt::print("{:08x} {}\n", instruction, Common::DisassembleAArch32(false, 0, (u8*)&instruction, sizeof(instruction)));
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fmt::print("Name: {}\n", GetNameOfA32Instruction(instruction));
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const A32::LocationDescriptor location{0, {}, {}};
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IR::Block ir_block{location};
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const bool should_continue = A32::TranslateSingleInstruction(ir_block, location, instruction);
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fmt::print("should_continue: {}\n\n", should_continue);
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Optimization::NamingPass(ir_block);
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fmt::print("IR:\n");
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fmt::print("{}\n", IR::DumpBlock(ir_block));
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Optimization::A32GetSetElimination(ir_block, {});
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Optimization::DeadCodeElimination(ir_block);
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Optimization::ConstantPropagation(ir_block);
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Optimization::DeadCodeElimination(ir_block);
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Optimization::IdentityRemovalPass(ir_block);
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fmt::print("Optimized IR:\n");
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fmt::print("{}\n", IR::DumpBlock(ir_block));
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}
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void PrintA64Instruction(u32 instruction) {
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fmt::print("{:08x} {}\n", instruction, Common::DisassembleAArch64(instruction));
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fmt::print("Name: {}\n", GetNameOfA64Instruction(instruction));
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const A64::LocationDescriptor location{0, {}};
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IR::Block ir_block{location};
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const bool should_continue = A64::TranslateSingleInstruction(ir_block, location, instruction);
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fmt::print("should_continue: {}\n\n", should_continue);
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Optimization::NamingPass(ir_block);
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fmt::print("IR:\n");
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fmt::print("{}\n", IR::DumpBlock(ir_block));
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Optimization::A64GetSetElimination(ir_block);
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Optimization::DeadCodeElimination(ir_block);
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Optimization::ConstantPropagation(ir_block);
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Optimization::DeadCodeElimination(ir_block);
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Optimization::IdentityRemovalPass(ir_block);
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fmt::print("Optimized IR:\n");
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fmt::print("{}\n", IR::DumpBlock(ir_block));
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}
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void PrintThumbInstruction(u32 instruction) {
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const size_t inst_size = (instruction >> 16) == 0 ? 2 : 4;
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if (inst_size == 4)
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instruction = mcl::bit::swap_halves_32(instruction);
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fmt::print("{:08x} {}\n", instruction, Common::DisassembleAArch32(true, 0, (u8*)&instruction, inst_size));
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const A32::LocationDescriptor location{0, A32::PSR{0x1F0}, {}};
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IR::Block ir_block{location};
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const bool should_continue = A32::TranslateSingleInstruction(ir_block, location, instruction);
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fmt::print("should_continue: {}\n\n", should_continue);
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Optimization::NamingPass(ir_block);
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fmt::print("IR:\n");
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fmt::print("{}\n", IR::DumpBlock(ir_block));
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Optimization::A32GetSetElimination(ir_block, {});
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Optimization::DeadCodeElimination(ir_block);
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Optimization::ConstantPropagation(ir_block);
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Optimization::DeadCodeElimination(ir_block);
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Optimization::IdentityRemovalPass(ir_block);
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fmt::print("Optimized IR:\n");
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fmt::print("{}\n", IR::DumpBlock(ir_block));
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}
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class ExecEnv final : public Dynarmic::A32::UserCallbacks {
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public:
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u64 ticks_left = 0;
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std::map<u32, u8> memory;
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std::uint8_t MemoryRead8(u32 vaddr) override {
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if (auto iter = memory.find(vaddr); iter != memory.end()) {
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return iter->second;
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}
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return 0;
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}
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std::uint16_t MemoryRead16(u32 vaddr) override {
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return u16(MemoryRead8(vaddr)) | u16(MemoryRead8(vaddr + 1)) << 8;
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}
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std::uint32_t MemoryRead32(u32 vaddr) override {
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return u32(MemoryRead16(vaddr)) | u32(MemoryRead16(vaddr + 2)) << 16;
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}
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std::uint64_t MemoryRead64(u32 vaddr) override {
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return u64(MemoryRead32(vaddr)) | u64(MemoryRead32(vaddr + 4)) << 32;
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}
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void MemoryWrite8(u32 vaddr, std::uint8_t value) override {
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memory[vaddr] = value;
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}
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void MemoryWrite16(u32 vaddr, std::uint16_t value) override {
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MemoryWrite8(vaddr, static_cast<u8>(value));
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MemoryWrite8(vaddr + 1, static_cast<u8>(value >> 8));
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}
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void MemoryWrite32(u32 vaddr, std::uint32_t value) override {
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MemoryWrite16(vaddr, static_cast<u16>(value));
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MemoryWrite16(vaddr + 2, static_cast<u16>(value >> 16));
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}
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void MemoryWrite64(u32 vaddr, std::uint64_t value) override {
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MemoryWrite32(vaddr, static_cast<u32>(value));
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MemoryWrite32(vaddr + 4, static_cast<u32>(value >> 32));
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}
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void InterpreterFallback(u32 pc, size_t num_instructions) override {
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fmt::print("> InterpreterFallback({:08x}, {}) code = {:08x}\n", pc, num_instructions, *MemoryReadCode(pc));
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}
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void CallSVC(std::uint32_t swi) override {
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fmt::print("> CallSVC({})\n", swi);
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}
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void ExceptionRaised(u32 pc, Dynarmic::A32::Exception exception) override {
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fmt::print("> ExceptionRaised({:08x}, {})", pc, static_cast<size_t>(exception));
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}
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void AddTicks(std::uint64_t ticks) override {
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if (ticks > ticks_left) {
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ticks_left = 0;
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return;
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}
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ticks_left -= ticks;
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}
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std::uint64_t GetTicksRemaining() override {
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return ticks_left;
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}
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};
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void ExecuteA32Instruction(u32 instruction) {
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ExecEnv env;
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A32::Jit cpu{A32::UserConfig{&env}};
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env.ticks_left = 1;
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std::array<u32, 16> regs{};
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std::array<u32, 64> ext_regs{};
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u32 cpsr = 0;
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u32 fpscr = 0;
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const std::map<std::string, u32*> name_map = [®s, &ext_regs, &cpsr, &fpscr] {
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std::map<std::string, u32*> name_map;
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for (size_t i = 0; i < regs.size(); i++) {
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name_map[fmt::format("r{}", i)] = ®s[i];
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}
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for (size_t i = 0; i < ext_regs.size(); i++) {
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name_map[fmt::format("s{}", i)] = &ext_regs[i];
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}
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name_map["sp"] = ®s[13];
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name_map["lr"] = ®s[14];
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name_map["pc"] = ®s[15];
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name_map["cpsr"] = &cpsr;
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name_map["fpscr"] = &fpscr;
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return name_map;
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}();
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const auto get_line = []() {
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std::string line;
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std::getline(std::cin, line);
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std::transform(line.begin(), line.end(), line.begin(), [](unsigned char c) { return static_cast<char>(std::tolower(c)); });
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return line;
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};
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const auto get_value = [&get_line]() -> std::optional<u32> {
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std::string line = get_line();
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if (line.length() > 2 && line[0] == '0' && line[1] == 'x')
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line = line.substr(2);
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if (line.length() > 8)
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return std::nullopt;
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char* endptr;
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const u32 value = strtol(line.c_str(), &endptr, 16);
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if (line.c_str() + line.length() != endptr)
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return std::nullopt;
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return value;
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};
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while (std::cin) {
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fmt::print("register: ");
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const std::string reg_name = get_line();
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if (const auto iter = name_map.find(reg_name); iter != name_map.end()) {
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fmt::print("value: ");
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if (const auto value = get_value()) {
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*(iter->second) = *value;
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fmt::print("> {} = 0x{:08x}\n", reg_name, *value);
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}
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} else if (reg_name == "mem" || reg_name == "memory") {
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fmt::print("address: ");
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if (const auto address = get_value()) {
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fmt::print("value: ");
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if (const auto value = get_value()) {
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env.MemoryWrite32(*address, *value);
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fmt::print("> mem[0x{:08x}] = 0x{:08x}\n", *address, *value);
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}
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}
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} else if (reg_name == "end") {
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break;
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}
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}
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fmt::print("\n\n");
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cpu.Regs() = regs;
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cpu.ExtRegs() = ext_regs;
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cpu.SetCpsr(cpsr);
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cpu.SetFpscr(fpscr);
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const u32 initial_pc = regs[15];
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env.MemoryWrite32(initial_pc + 0, instruction);
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env.MemoryWrite32(initial_pc + 4, 0xEAFFFFFE); // B +0
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cpu.Run();
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fmt::print("Registers modified:\n");
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for (size_t i = 0; i < regs.size(); ++i) {
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if (regs[i] != cpu.Regs()[i]) {
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fmt::print("{:3s}: {:08x}\n", static_cast<A32::Reg>(i), cpu.Regs()[i]);
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}
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}
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for (size_t i = 0; i < ext_regs.size(); ++i) {
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if (ext_regs[i] != cpu.ExtRegs()[i]) {
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fmt::print("{:3s}: {:08x}\n", static_cast<A32::ExtReg>(i), cpu.Regs()[i]);
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}
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}
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if (cpsr != cpu.Cpsr()) {
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fmt::print("cpsr {:08x}\n", cpu.Cpsr());
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}
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if (fpscr != cpu.Fpscr()) {
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fmt::print("fpscr{:08x}\n", cpu.Fpscr());
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}
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fmt::print("Modified memory:\n");
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for (auto iter = env.memory.begin(); iter != env.memory.end(); ++iter) {
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fmt::print("{:08x} {:02x}\n", iter->first, iter->second);
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}
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}
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int main(int argc, char** argv) {
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if (argc < 3 || argc > 4) {
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fmt::print("usage: {} <a32/a64/thumb> <instruction_in_hex> [-exec]\n", argv[0]);
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return 1;
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}
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const char* const hex_instruction = [argv] {
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if (strlen(argv[2]) > 2 && argv[2][0] == '0' && argv[2][1] == 'x') {
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return argv[2] + 2;
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}
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return argv[2];
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}();
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if (strlen(hex_instruction) > 8) {
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fmt::print("hex string too long\n");
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return 1;
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}
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const u32 instruction = strtol(hex_instruction, nullptr, 16);
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if (strcmp(argv[1], "a32") == 0) {
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PrintA32Instruction(instruction);
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} else if (strcmp(argv[1], "a64") == 0) {
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PrintA64Instruction(instruction);
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} else if (strcmp(argv[1], "t32") == 0 || strcmp(argv[1], "t16") == 0 || strcmp(argv[1], "thumb") == 0) {
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PrintThumbInstruction(instruction);
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} else {
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fmt::print("Invalid mode: {}\nValid values: a32, a64, thumb\n", argv[1]);
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return 1;
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}
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if (argc == 4) {
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if (strcmp(argv[3], "-exec") != 0) {
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fmt::print("Invalid option {}\n", argv[3]);
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return 1;
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}
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if (strcmp(argv[1], "a32") == 0) {
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ExecuteA32Instruction(instruction);
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} else {
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fmt::print("Executing in this mode not currently supported\n");
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return 1;
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}
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}
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return 0;
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}
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