ryujinx-backup/ChocolArm64
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A C# ARM64 emulator that works translating ARM code to CIL
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LDj3SNuD 9533b338ac Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdMove.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdShift.cs

* Update ASoftFallback.cs

* Update ASoftFloat.cs

* Update AOpCodeSimdRegElemF.cs

* Update CpuTestSimdIns.cs

* Update CpuTestSimdRegElem.cs

* Create CpuTestSimdRegElemF.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Superseded Fmul_Se Test. Nit.

* Address PR feedback.

* Address PR feedback.

* Update AInstEmitSimdArithmetic.cs

* Update ASoftFallback.cs

* Update AInstEmitAlu.cs

* Update AInstEmitSimdShift.cs
2018-10-13 23:35:16 -03:00
Decoder Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449) 2018-10-13 23:35:16 -03:00
Decoder32 Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now) 2018-05-26 17:50:47 -03:00
Events Remove cold methods from the CPU cache (#224) 2018-09-19 17:07:56 -03:00
Exceptions More flexible memory manager (#307) 2018-08-15 15:59:51 -03:00
Instruction Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449) 2018-10-13 23:35:16 -03:00
Instruction32 Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now) 2018-05-26 17:50:47 -03:00
Memory Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405) 2018-09-26 23:30:21 -03:00
State Remove cold methods from the CPU cache (#224) 2018-09-19 17:07:56 -03:00
Translation Remove cold methods from the CPU cache (#224) 2018-09-19 17:07:56 -03:00
ABitUtils.cs Fix/Add 10 Shift Right and Mls_Ve Instructions; add 14 Tests. (#407) 2018-09-08 14:24:29 -03:00
AOpCodeTable.cs Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449) 2018-10-13 23:35:16 -03:00
AOptimizations.cs Add 9+7 fast/slow FP inst. impls.; add 14 FP Tests. (#437) 2018-10-05 22:45:59 -03:00
AThread.cs Fix performance regression caused by the new scheduler changes (#422) 2018-09-19 12:16:20 -03:00
ATranslatedSub.cs Remove cold methods from the CPU cache (#224) 2018-09-19 17:07:56 -03:00
ATranslatedSubType.cs Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now) 2018-05-26 17:50:47 -03:00
ATranslator.cs Remove cold methods from the CPU cache (#224) 2018-09-19 17:07:56 -03:00
ATranslatorCache.cs Tweak cpu cache deletion policy values (#433) 2018-10-07 23:40:37 -03:00
ChocolArm64.csproj Add linux-x64 to RID property to make tests works on linux (#205) 2018-06-30 12:43:04 -03:00