ryujinx-backup/ChocolArm64
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30 commits

Author SHA1 Message Date
Lordmau5
d99c39b448 Implement Fabs_V (#146) 2018-06-12 09:29:16 -03:00
gdkchan
1aa96453ef Add intrinsics support (#121) 
* Initial intrinsics support

* Update tests to work with the new Vector128 type and intrinsics

* Drop SSE4.1 requirement

* Fix copy-paste mistake
 2018-05-11 20:10:27 -03:00
LDj3SNuD
f9b17f86c1 Add Sqxtn_S, Sqxtn_V, Uqxtn_S, Uqxtn_V instructions and Tests (6). (#110) 
* Update ILGeneratorEx.cs

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Update CpuTest.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdArithmetic.cs
 2018-04-29 20:39:58 -03:00
LDj3SNuD
966f6b7203 Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_V, Bsl_V, Cls_V, Clz_V, Orn_V, Orr_V. (#104) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdLogical.cs

* Update AInstEmitSimdArithmetic.cs

* Update ASoftFallback.cs

* Update AInstEmitAlu.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update CpuTestSimdReg.cs

* Update CpuTestSimd.cs
 2018-04-25 23:20:22 -03:00
LDj3SNuD
bc4ada20c7 Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update Bits.cs

* Create CpuTestSimd.cs

* Create CpuTestSimdReg.cs

* Update CpuTestSimd.cs

Provide a better supply of input values for the 20 Simd Tests.

* Update CpuTestSimdReg.cs

Provide a better supply of input values for the 20 Simd Tests.

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs
 2018-04-20 12:40:15 -03:00
MS-DOS1999
b0368079fb Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89) 2018-04-19 00:22:12 -03:00
LDj3SNuD
5a383d86b1 Add ABS (scalar & vector), ADD (scalar), NEG (scalar) instructions. (#88) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update AOpCodeTable.cs
 2018-04-18 10:56:27 -03:00
LDj3SNuD
65c490f350 Add FMUL (scalar, by element) instruction; add FRECPE, FRECPS (scalar & vector) instructions. Add 5 simple tests. (#74) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdHelper.cs

* Update CpuTestSimdArithmetic.cs

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs
 2018-04-08 16:08:57 -03:00
gdkchan
6282fe6607 Fix FRSQRTS and FCM* (scalar) instructions 2018-04-06 10:20:17 -03:00
gdkchan
35ff142104 Add FMLS (vector) instruction 2018-04-06 01:41:54 -03:00
gdkchan
b73b522835 Add FRSQRTS and FCM* instructions 2018-04-05 23:28:12 -03:00
Merry
c4c247deb4 Implement Frsqrte_S (#72) 
* Implement Frsqrte_S

* Implement Frsqrte_V

* Add Frsqrte_S test
 2018-04-05 20:36:19 -03:00
gdkchan
ee98d50e17 Add Faddp (vector) instruction 2018-04-04 22:13:10 -03:00
gdkchan
9037055c10 Add FNEG (vector) instruction 2018-04-04 16:36:07 -03:00
gdkchan
6cb940049d Fix EXT/Widening instruction carrying garbage values on some cases, fix ABD (it shouldn't accumulate, this is another variation of the instruction) 2018-03-30 17:37:31 -03:00
gdkchan
e580ef1bcf Add UABD instruction 2018-03-30 16:30:23 -03:00
gdkchan
7423ff43a5 Add UABDL instruction 2018-03-30 16:16:16 -03:00
gdkchan
442904a5ed Add UADDL instruction 2018-03-30 15:55:28 -03:00
gdkchan
0a7aaa345c Add UHADD instruction 2018-03-30 12:37:07 -03:00
gdkchan
4f92aa0ee2 Add FNMADD instruction 2018-03-24 00:28:23 -03:00
MS-DOS1999
9e124e75f4 Add Frint Instructions and Tests (#62) 
* add 'ADC 32bit and Overflow' test

* Add WZR/WSP tests

* fix ADC and ADDS

* add ADCS test

* add SBCS test

* indent my code and delete comment

* '/' <- i hate you x)

* remove spacebar char

* remove false tab

* add frintx_S test

* update frintx_S test

* add ASRV test

* fix new line

* fix PR

* fix indent

* Add add_V tests

* work on Frintx_V

* Add Frintx_V Instruction

* add some instruction and test

* Syntax + indent

* Delete Console Write

* Delete Console Write 2

* CR del

* Skip NaNs tests

* Skip NaNs tests 2

* Fix errors 1

* Fix errors 2
 2018-03-23 07:40:23 -03:00
gdkchan
f4f5d244f1 Add MLA (vector by element), fixes some cases of MUL (vector by element)? 2018-03-15 22:36:47 -03:00
gdkchan
4f9faf3e32 Add FRINTM (vector) instruction 2018-03-09 23:41:05 -03:00
gdkchan
9376a61229 Add SMLAL (vector), fix EXT instruction 2018-03-06 21:36:49 -03:00
gdkchan
3020de224e Add MUL (vector by element), fix FCVTN, make svcs use MakeError too 2018-03-05 16:18:37 -03:00
gdkchan
fc105218a2 Add EXT, CMTST (vector) and UMULL (vector) instructions 2018-03-02 19:23:38 -03:00
gdkchan
d2f3bd3526 Add FABD (scalar), ADCS, SBCS instructions, update config with better default control mappings, update readme with the new mappings 2018-02-24 18:47:08 -03:00
gdkchan
7e68a890a1 Fix cpu issue with cmp optimization, add HINT and FRINTX (scalar) instructions, fix for NvFlinger sometimes missing free buffers 2018-02-24 11:19:28 -03:00
gdkchan
0268145fca Add FRINTP instruction, fix opcode ctor call method creation with multithreading 2018-02-22 16:26:11 -03:00
emmauss
7601c05662 Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00