LDj3SNuD
9533b338ac
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. ( #449 )
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* Update AOpCodeTable.cs
* Update AInstEmitSimdMove.cs
* Update AInstEmitSimdArithmetic.cs
* Update AInstEmitSimdShift.cs
* Update ASoftFallback.cs
* Update ASoftFloat.cs
* Update AOpCodeSimdRegElemF.cs
* Update CpuTestSimdIns.cs
* Update CpuTestSimdRegElem.cs
* Create CpuTestSimdRegElemF.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
* Superseded Fmul_Se Test. Nit.
* Address PR feedback.
* Address PR feedback.
* Update AInstEmitSimdArithmetic.cs
* Update ASoftFallback.cs
* Update AInstEmitAlu.cs
* Update AInstEmitSimdShift.cs
2018-10-13 23:35:16 -03:00
gdkchan
0cf462669d
Remove cold methods from the CPU cache ( #224 )
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* Remove unused tracing functionality from the CPU
* GetNsoExecutable -> GetExecutable
* Unsigned comparison
* Re-add cpu tracing
* Config change
* Remove cold methods from the translation cache on the cpu
* Replace lock with try lock, pass new ATranslatorCache instead of ATranslator
* Rebase fixups
2018-09-19 17:07:56 -03:00
LDj3SNuD
80836050ef
Fix/Add 10 Shift Right and Mls_Ve Instructions; add 14 Tests. ( #407 )
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* Update AOpCodeTable.cs
* Update AInstEmitSimdShift.cs
* Update ASoftFallback.cs
* Update AOpCodeSimdShImm.cs
* Update ABitUtils.cs
* Update AInstEmitSimdArithmetic.cs
* Update AInstEmitSimdHelper.cs
* Create CpuTestSimdShImm.cs
* Create CpuTestSimdRegElem.cs
* Address PR feedback.
* Nit.
* Nit.
2018-09-08 14:24:29 -03:00
gdkchan
7869b7e257
Added support for more shader instructions and texture formats, fix swapped channels in RGB565 and RGBA5551? texture formats, allow zero values on blending registers, initial work to build CFG on the shader decoder, update the BRA instruction to work with it (WIP)
2018-05-29 20:37:10 -03:00
gdkchan
09b194aaf0
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
2018-05-26 17:50:47 -03:00
gdkchan
c3a48b8f5c
[CPU] Fix CBZ/CBNZ with 32 bits operands
2018-04-06 17:22:26 -03:00
gdkchan
67184bcff7
Enable all ld/st (single structure) instructions
2018-03-30 18:06:02 -03:00
gdkchan
f4f5d244f1
Add MLA (vector by element), fixes some cases of MUL (vector by element)?
2018-03-15 22:36:47 -03:00
gdkchan
13bfb623ef
Fix CPU instruction Ld/St (single structure) with index != 0
2018-03-15 12:59:23 -03:00
gdkchan
bcf4cbf135
CPU fix for the cases using a Mask with shift = 0
2018-03-14 01:59:22 -03:00
gdkchan
9376a61229
Add SMLAL (vector), fix EXT instruction
2018-03-06 21:36:49 -03:00
gdkchan
20561b48d7
Remove QueryMemory workaround
2018-03-05 16:20:30 -03:00
gdkchan
3020de224e
Add MUL (vector by element), fix FCVTN, make svcs use MakeError too
2018-03-05 16:18:37 -03:00
gdkchan
6d60fcfc24
Improve CPU initial translation speeds ( #50 )
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* Add background translation to the CPU
* Do not use a separate thread for translation, implement 2 tiers translation
* Remove unnecessary usings
* Lower MinCallCountForReJit
* Remove unused variable
2018-03-04 14:09:59 -03:00
gdkchan
fc105218a2
Add EXT, CMTST (vector) and UMULL (vector) instructions
2018-03-02 19:23:38 -03:00
gdkchan
068754fec5
Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store
2018-02-25 22:14:58 -03:00
gdkchan
7e68a890a1
Fix cpu issue with cmp optimization, add HINT and FRINTX (scalar) instructions, fix for NvFlinger sometimes missing free buffers
2018-02-24 11:19:28 -03:00
gdkchan
0268145fca
Add FRINTP instruction, fix opcode ctor call method creation with multithreading
2018-02-22 16:26:11 -03:00
emmauss
7601c05662
Split main project into core,graphics and chocolarm4 subproject ( #29 )
2018-02-20 17:09:23 -03:00
