From a250878bfefc198a18b46bc8645065ca5ba95918 Mon Sep 17 00:00:00 2001
From: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>
Date: Sun, 30 Jun 2019 01:02:48 +0200
Subject: [PATCH] Implement the remaining tests for Simd and Fp instructions of
 data processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709)

* Update CpuTestSimdShImm.cs

* Update OpCodeTable.cs

* Update CpuTestSimdReg.cs

* Add Ins_Gp & Ins_V Tests.

Improve Smov_S & Umov_S Tests.

* Add Bic_Vi & Orr_Vi Tests.

* OpTable Fixes for Bic_Vi & Orr_Vi Insts.

* Add Saddlv_V & Uaddlv_V Tests.

* Nit.

* Add Smull_V & Umull_V Tests.

Improve Simd Permute Tests.

* Nit.

* Add Fcsel_S Test.

* Add Fnmadd_S, Fnmsub_S & Fnmul_S Tests.

* Fmov_V -> Fmov_Vi

* OpTable Fixes for Fmov_Si & Fmov_Vi Insts.

* Add Fmov_Vi Test.

* Add Fmov_S Test.

* Add Fmov_Si Test.

Add new test category SimdFmov.

* Nit.

* OpTable Fixes for Fmov_Ftoi/1 & Fmov_Itof/1 Insts.

* Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts.

Small simpl. for Smov_S Inst.
Remove unnecessary method EmitIntZeroUpperIfNeeded.

* Add Fmov_Ftoi/1 & Fmov_Itof/1 Tests.
---
 Instructions/InstEmitSimdMove.cs | 38 ++++++++++----------------------
 OpCodeTable.cs                   | 24 ++++++++++++--------
 2 files changed, 27 insertions(+), 35 deletions(-)

diff --git a/Instructions/InstEmitSimdMove.cs b/Instructions/InstEmitSimdMove.cs
index 841dcfe..647a223 100644
--- a/Instructions/InstEmitSimdMove.cs
+++ b/Instructions/InstEmitSimdMove.cs
@@ -220,45 +220,37 @@ namespace ChocolArm64.Instructions
 
         public static void Fmov_Ftoi(ILEmitterCtx context)
         {
-            OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
-            EmitVectorExtractZx(context, op.Rn, 0, 3);
-
-            EmitIntZeroUpperIfNeeded(context);
+            EmitVectorExtractZx(context, op.Rn, 0, op.Size + 2);
 
             context.EmitStintzr(op.Rd);
         }
 
         public static void Fmov_Ftoi1(ILEmitterCtx context)
         {
-            OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             EmitVectorExtractZx(context, op.Rn, 1, 3);
 
-            EmitIntZeroUpperIfNeeded(context);
-
             context.EmitStintzr(op.Rd);
         }
 
         public static void Fmov_Itof(ILEmitterCtx context)
         {
-            OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
-            EmitIntZeroUpperIfNeeded(context);
-
-            EmitScalarSet(context, op.Rd, 3);
+            EmitScalarSet(context, op.Rd, op.Size + 2);
         }
 
         public static void Fmov_Itof1(ILEmitterCtx context)
         {
-            OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
-            EmitIntZeroUpperIfNeeded(context);
-
             EmitVectorInsert(context, op.Rd, 1, 3);
         }
 
@@ -280,7 +272,7 @@ namespace ChocolArm64.Instructions
             EmitScalarSet(context, op.Rd, op.Size + 2);
         }
 
-        public static void Fmov_V(ILEmitterCtx context)
+        public static void Fmov_Vi(ILEmitterCtx context)
         {
             OpCodeSimdImm64 op = (OpCodeSimdImm64)context.CurrOp;
 
@@ -347,7 +339,11 @@ namespace ChocolArm64.Instructions
 
             EmitVectorExtractSx(context, op.Rn, op.DstIndex, op.Size);
 
-            EmitIntZeroUpperIfNeeded(context);
+            if (op.RegisterSize == RegisterSize.Simd64)
+            {
+                context.Emit(OpCodes.Conv_U4);
+                context.Emit(OpCodes.Conv_U8);
+            }
 
             context.EmitStintzr(op.Rd);
         }
@@ -544,16 +540,6 @@ namespace ChocolArm64.Instructions
             EmitVectorZip(context, part: 1);
         }
 
-        private static void EmitIntZeroUpperIfNeeded(ILEmitterCtx context)
-        {
-            if (context.CurrOp.RegisterSize == RegisterSize.Int32 ||
-                context.CurrOp.RegisterSize == RegisterSize.Simd64)
-            {
-                context.Emit(OpCodes.Conv_U4);
-                context.Emit(OpCodes.Conv_U8);
-            }
-        }
-
         private static void EmitMoviMvni(ILEmitterCtx context, bool not)
         {
             OpCodeSimdImm64 op = (OpCodeSimdImm64)context.CurrOp;
diff --git a/OpCodeTable.cs b/OpCodeTable.cs
index 2200fae..74cbdab 100644
--- a/OpCodeTable.cs
+++ b/OpCodeTable.cs
@@ -233,7 +233,8 @@ namespace ChocolArm64
             SetA64("0100111000101000011010xxxxxxxxxx", InstEmit.Aesmc_V,         typeof(OpCodeSimd64));
             SetA64("0x001110001xxxxx000111xxxxxxxxxx", InstEmit.And_V,           typeof(OpCodeSimdReg64));
             SetA64("0x001110011xxxxx000111xxxxxxxxxx", InstEmit.Bic_V,           typeof(OpCodeSimdReg64));
-            SetA64("0x10111100000xxx<<x101xxxxxxxxxx", InstEmit.Bic_Vi,          typeof(OpCodeSimdImm64));
+            SetA64("0x10111100000xxx0xx101xxxxxxxxxx", InstEmit.Bic_Vi,          typeof(OpCodeSimdImm64));
+            SetA64("0x10111100000xxx10x101xxxxxxxxxx", InstEmit.Bic_Vi,          typeof(OpCodeSimdImm64));
             SetA64("0x101110111xxxxx000111xxxxxxxxxx", InstEmit.Bif_V,           typeof(OpCodeSimdReg64));
             SetA64("0x101110101xxxxx000111xxxxxxxxxx", InstEmit.Bit_V,           typeof(OpCodeSimdReg64));
             SetA64("0x101110011xxxxx000111xxxxxxxxxx", InstEmit.Bsl_V,           typeof(OpCodeSimdReg64));
@@ -341,12 +342,15 @@ namespace ChocolArm64
             SetA64("0>0011101<1xxxxx110011xxxxxxxxxx", InstEmit.Fmls_V,          typeof(OpCodeSimdReg64));
             SetA64("0>0011111<xxxxxx0101x0xxxxxxxxxx", InstEmit.Fmls_Ve,         typeof(OpCodeSimdRegElemF64));
             SetA64("000111100x100000010000xxxxxxxxxx", InstEmit.Fmov_S,          typeof(OpCodeSimd64));
-            SetA64("00011110xx1xxxxxxxx100xxxxxxxxxx", InstEmit.Fmov_Si,         typeof(OpCodeSimdFmov64));
-            SetA64("0xx0111100000xxx111101xxxxxxxxxx", InstEmit.Fmov_V,          typeof(OpCodeSimdImm64));
-            SetA64("x00111100x100110000000xxxxxxxxxx", InstEmit.Fmov_Ftoi,       typeof(OpCodeSimdCvt64));
-            SetA64("x00111100x100111000000xxxxxxxxxx", InstEmit.Fmov_Itof,       typeof(OpCodeSimdCvt64));
-            SetA64("1001111010101110000000xxxxxxxxxx", InstEmit.Fmov_Ftoi1,      typeof(OpCodeSimdCvt64));
-            SetA64("1001111010101111000000xxxxxxxxxx", InstEmit.Fmov_Itof1,      typeof(OpCodeSimdCvt64));
+            SetA64("000111100x1xxxxxxxx10000000xxxxx", InstEmit.Fmov_Si,         typeof(OpCodeSimdFmov64));
+            SetA64("0x00111100000xxx111101xxxxxxxxxx", InstEmit.Fmov_Vi,         typeof(OpCodeSimdImm64));
+            SetA64("0110111100000xxx111101xxxxxxxxxx", InstEmit.Fmov_Vi,         typeof(OpCodeSimdImm64));
+            SetA64("0001111000100110000000xxxxxxxxxx", InstEmit.Fmov_Ftoi,       typeof(OpCodeSimd64));
+            SetA64("1001111001100110000000xxxxxxxxxx", InstEmit.Fmov_Ftoi,       typeof(OpCodeSimd64));
+            SetA64("0001111000100111000000xxxxxxxxxx", InstEmit.Fmov_Itof,       typeof(OpCodeSimd64));
+            SetA64("1001111001100111000000xxxxxxxxxx", InstEmit.Fmov_Itof,       typeof(OpCodeSimd64));
+            SetA64("1001111010101110000000xxxxxxxxxx", InstEmit.Fmov_Ftoi1,      typeof(OpCodeSimd64));
+            SetA64("1001111010101111000000xxxxxxxxxx", InstEmit.Fmov_Itof1,      typeof(OpCodeSimd64));
             SetA64("000111110x0xxxxx1xxxxxxxxxxxxxxx", InstEmit.Fmsub_S,         typeof(OpCodeSimdReg64));
             SetA64("000111100x1xxxxx000010xxxxxxxxxx", InstEmit.Fmul_S,          typeof(OpCodeSimdReg64));
             SetA64("010111111xxxxxxx1001x0xxxxxxxxxx", InstEmit.Fmul_Se,         typeof(OpCodeSimdRegElemF64));
@@ -419,7 +423,8 @@ namespace ChocolArm64
             SetA64("0x10111000100000010110xxxxxxxxxx", InstEmit.Not_V,           typeof(OpCodeSimd64));
             SetA64("0x001110111xxxxx000111xxxxxxxxxx", InstEmit.Orn_V,           typeof(OpCodeSimdReg64));
             SetA64("0x001110101xxxxx000111xxxxxxxxxx", InstEmit.Orr_V,           typeof(OpCodeSimdReg64));
-            SetA64("0x00111100000xxx<<x101xxxxxxxxxx", InstEmit.Orr_Vi,          typeof(OpCodeSimdImm64));
+            SetA64("0x00111100000xxx0xx101xxxxxxxxxx", InstEmit.Orr_Vi,          typeof(OpCodeSimdImm64));
+            SetA64("0x00111100000xxx10x101xxxxxxxxxx", InstEmit.Orr_Vi,          typeof(OpCodeSimdImm64));
             SetA64("0x101110<<1xxxxx010000xxxxxxxxxx", InstEmit.Raddhn_V,        typeof(OpCodeSimdReg64));
             SetA64("0x10111001100000010110xxxxxxxxxx", InstEmit.Rbit_V,          typeof(OpCodeSimd64));
             SetA64("0x00111000100000000110xxxxxxxxxx", InstEmit.Rev16_V,         typeof(OpCodeSimd64));
@@ -458,7 +463,8 @@ namespace ChocolArm64
             SetA64("0x101110<<100001001110xxxxxxxxxx", InstEmit.Shll_V,          typeof(OpCodeSimd64));
             SetA64("0x00111100>>>xxx100001xxxxxxxxxx", InstEmit.Shrn_V,          typeof(OpCodeSimdShImm64));
             SetA64("0x001110<<1xxxxx001001xxxxxxxxxx", InstEmit.Shsub_V,         typeof(OpCodeSimdReg64));
-            SetA64("0x1011110>>>>xxx010101xxxxxxxxxx", InstEmit.Sli_V,           typeof(OpCodeSimdShImm64));
+            SetA64("0x10111100>>>xxx010101xxxxxxxxxx", InstEmit.Sli_V,           typeof(OpCodeSimdShImm64));
+            SetA64("0110111101xxxxxx010101xxxxxxxxxx", InstEmit.Sli_V,           typeof(OpCodeSimdShImm64));
             SetA64("0x001110<<1xxxxx011001xxxxxxxxxx", InstEmit.Smax_V,          typeof(OpCodeSimdReg64));
             SetA64("0x001110<<1xxxxx101001xxxxxxxxxx", InstEmit.Smaxp_V,         typeof(OpCodeSimdReg64));
             SetA64("000011100x110000101010xxxxxxxxxx", InstEmit.Smaxv_V,         typeof(OpCodeSimd64));