forked from suyu/suyu
VideoCore: Split u64 Pica reg unions into 2 separate u32 unions
This eliminates UB when aliasing it with the array of u32 regs, and is compatible with non-LE architectures.
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parent
bfb1531352
commit
553e672777
1 changed files with 41 additions and 35 deletions
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@ -14,7 +14,7 @@
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namespace Pica {
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struct PipelineRegs {
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enum class VertexAttributeFormat : u64 {
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enum class VertexAttributeFormat : u32 {
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BYTE = 0,
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UBYTE = 1,
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SHORT = 2,
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@ -31,34 +31,37 @@ struct PipelineRegs {
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// Descriptor for internal vertex attributes
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union {
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BitField<0, 2, VertexAttributeFormat> format0; // size of one element
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BitField<2, 2, u64> size0; // number of elements minus 1
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BitField<2, 2, u32> size0; // number of elements minus 1
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BitField<4, 2, VertexAttributeFormat> format1;
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BitField<6, 2, u64> size1;
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BitField<6, 2, u32> size1;
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BitField<8, 2, VertexAttributeFormat> format2;
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BitField<10, 2, u64> size2;
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BitField<10, 2, u32> size2;
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BitField<12, 2, VertexAttributeFormat> format3;
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BitField<14, 2, u64> size3;
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BitField<14, 2, u32> size3;
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BitField<16, 2, VertexAttributeFormat> format4;
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BitField<18, 2, u64> size4;
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BitField<18, 2, u32> size4;
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BitField<20, 2, VertexAttributeFormat> format5;
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BitField<22, 2, u64> size5;
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BitField<22, 2, u32> size5;
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BitField<24, 2, VertexAttributeFormat> format6;
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BitField<26, 2, u64> size6;
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BitField<26, 2, u32> size6;
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BitField<28, 2, VertexAttributeFormat> format7;
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BitField<30, 2, u64> size7;
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BitField<32, 2, VertexAttributeFormat> format8;
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BitField<34, 2, u64> size8;
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BitField<36, 2, VertexAttributeFormat> format9;
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BitField<38, 2, u64> size9;
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BitField<40, 2, VertexAttributeFormat> format10;
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BitField<42, 2, u64> size10;
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BitField<44, 2, VertexAttributeFormat> format11;
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BitField<46, 2, u64> size11;
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BitField<30, 2, u32> size7;
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};
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BitField<48, 12, u64> attribute_mask;
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union {
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BitField<0, 2, VertexAttributeFormat> format8;
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BitField<2, 2, u32> size8;
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BitField<4, 2, VertexAttributeFormat> format9;
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BitField<6, 2, u32> size9;
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BitField<8, 2, VertexAttributeFormat> format10;
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BitField<10, 2, u32> size10;
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BitField<12, 2, VertexAttributeFormat> format11;
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BitField<14, 2, u32> size11;
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BitField<16, 12, u32> attribute_mask;
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// number of total attributes minus 1
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BitField<60, 4, u64> max_attribute_index;
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BitField<28, 4, u32> max_attribute_index;
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};
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inline VertexAttributeFormat GetFormat(int n) const {
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@ -69,7 +72,7 @@ struct PipelineRegs {
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}
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inline int GetNumElements(int n) const {
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u64 sizes[] = {size0, size1, size2, size3, size4, size5,
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u32 sizes[] = {size0, size1, size2, size3, size4, size5,
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size6, size7, size8, size9, size10, size11};
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return (int)sizes[n] + 1;
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}
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@ -99,27 +102,30 @@ struct PipelineRegs {
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u32 data_offset;
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union {
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BitField<0, 4, u64> comp0;
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BitField<4, 4, u64> comp1;
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BitField<8, 4, u64> comp2;
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BitField<12, 4, u64> comp3;
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BitField<16, 4, u64> comp4;
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BitField<20, 4, u64> comp5;
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BitField<24, 4, u64> comp6;
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BitField<28, 4, u64> comp7;
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BitField<32, 4, u64> comp8;
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BitField<36, 4, u64> comp9;
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BitField<40, 4, u64> comp10;
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BitField<44, 4, u64> comp11;
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BitField<0, 4, u32> comp0;
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BitField<4, 4, u32> comp1;
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BitField<8, 4, u32> comp2;
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BitField<12, 4, u32> comp3;
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BitField<16, 4, u32> comp4;
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BitField<20, 4, u32> comp5;
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BitField<24, 4, u32> comp6;
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BitField<28, 4, u32> comp7;
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};
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union {
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BitField<0, 4, u32> comp8;
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BitField<4, 4, u32> comp9;
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BitField<8, 4, u32> comp10;
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BitField<12, 4, u32> comp11;
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// bytes for a single vertex in this loader
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BitField<48, 8, u64> byte_count;
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BitField<16, 8, u32> byte_count;
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BitField<60, 4, u64> component_count;
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BitField<28, 4, u32> component_count;
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};
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inline int GetComponent(int n) const {
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u64 components[] = {comp0, comp1, comp2, comp3, comp4, comp5,
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u32 components[] = {comp0, comp1, comp2, comp3, comp4, comp5,
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comp6, comp7, comp8, comp9, comp10, comp11};
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return (int)components[n];
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}
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