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macro_jit_x64: Should not skip zero registers for certain ALU ops

The code generated for these ALU ops assume src_a and src_b are always valid.
This commit is contained in:
MerryMage 2020-06-15 22:01:00 +01:00
parent b660ef6c8a
commit a6ddd7c382

View file

@ -56,11 +56,13 @@ void MacroJITx64Impl::Compile_ALU(Macro::Opcode opcode) {
const bool valid_operation = !is_a_zero && !is_b_zero; const bool valid_operation = !is_a_zero && !is_b_zero;
const bool is_move_operation = !is_a_zero && is_b_zero; const bool is_move_operation = !is_a_zero && is_b_zero;
const bool has_zero_register = is_a_zero || is_b_zero; const bool has_zero_register = is_a_zero || is_b_zero;
const bool no_zero_reg_skip = opcode.alu_operation == Macro::ALUOperation::AddWithCarry ||
opcode.alu_operation == Macro::ALUOperation::SubtractWithBorrow;
Xbyak::Reg32 src_a; Xbyak::Reg32 src_a;
Xbyak::Reg32 src_b; Xbyak::Reg32 src_b;
if (!optimizer.zero_reg_skip) { if (!optimizer.zero_reg_skip || no_zero_reg_skip) {
src_a = Compile_GetRegister(opcode.src_a, RESULT); src_a = Compile_GetRegister(opcode.src_a, RESULT);
src_b = Compile_GetRegister(opcode.src_b, eax); src_b = Compile_GetRegister(opcode.src_b, eax);
} else { } else {