video_core: Adjust topology update logic
This commit is contained in:
parent
41461514d6
commit
15d63c3d3d
2 changed files with 23 additions and 23 deletions
|
@ -46,9 +46,6 @@ void DrawManager::ProcessMethodCall(u32 method, u32 argument) {
|
||||||
SetInlineIndexBuffer(regs.inline_index_4x8.index2);
|
SetInlineIndexBuffer(regs.inline_index_4x8.index2);
|
||||||
SetInlineIndexBuffer(regs.inline_index_4x8.index3);
|
SetInlineIndexBuffer(regs.inline_index_4x8.index3);
|
||||||
break;
|
break;
|
||||||
case MAXWELL3D_REG_INDEX(topology_override):
|
|
||||||
use_topology_override = true;
|
|
||||||
break;
|
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -156,11 +153,12 @@ void DrawManager::DrawIndexSmall(u32 argument) {
|
||||||
ProcessDraw(true, 1);
|
ProcessDraw(true, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
void DrawManager::ProcessTopologyOverride() {
|
void DrawManager::UpdateTopology() {
|
||||||
if (!use_topology_override)
|
|
||||||
return;
|
|
||||||
|
|
||||||
const auto& regs{maxwell3d->regs};
|
const auto& regs{maxwell3d->regs};
|
||||||
|
switch (regs.primitive_topology_control) {
|
||||||
|
case PrimitiveTopologyControl::UseInBeginMethods:
|
||||||
|
break;
|
||||||
|
case PrimitiveTopologyControl::UseSeparateState:
|
||||||
switch (regs.topology_override) {
|
switch (regs.topology_override) {
|
||||||
case PrimitiveTopologyOverride::None:
|
case PrimitiveTopologyOverride::None:
|
||||||
break;
|
break;
|
||||||
|
@ -177,13 +175,15 @@ void DrawManager::ProcessTopologyOverride() {
|
||||||
draw_state.topology = static_cast<PrimitiveTopology>(regs.topology_override);
|
draw_state.topology = static_cast<PrimitiveTopology>(regs.topology_override);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void DrawManager::ProcessDraw(bool draw_indexed, u32 instance_count) {
|
void DrawManager::ProcessDraw(bool draw_indexed, u32 instance_count) {
|
||||||
LOG_TRACE(HW_GPU, "called, topology={}, count={}", draw_state.topology.Value(),
|
LOG_TRACE(HW_GPU, "called, topology={}, count={}", draw_state.topology.Value(),
|
||||||
draw_indexed ? draw_state.index_buffer.count : draw_state.vertex_buffer.count);
|
draw_indexed ? draw_state.index_buffer.count : draw_state.vertex_buffer.count);
|
||||||
|
|
||||||
ProcessTopologyOverride();
|
UpdateTopology();
|
||||||
|
|
||||||
if (maxwell3d->ShouldExecute())
|
if (maxwell3d->ShouldExecute())
|
||||||
maxwell3d->rasterizer->Draw(draw_indexed, instance_count);
|
maxwell3d->rasterizer->Draw(draw_indexed, instance_count);
|
||||||
|
|
|
@ -10,6 +10,7 @@ class RasterizerInterface;
|
||||||
}
|
}
|
||||||
|
|
||||||
namespace Tegra::Engines {
|
namespace Tegra::Engines {
|
||||||
|
using PrimitiveTopologyControl = Maxwell3D::Regs::PrimitiveTopologyControl;
|
||||||
using PrimitiveTopology = Maxwell3D::Regs::PrimitiveTopology;
|
using PrimitiveTopology = Maxwell3D::Regs::PrimitiveTopology;
|
||||||
using PrimitiveTopologyOverride = Maxwell3D::Regs::PrimitiveTopologyOverride;
|
using PrimitiveTopologyOverride = Maxwell3D::Regs::PrimitiveTopologyOverride;
|
||||||
using IndexBuffer = Maxwell3D::Regs::IndexBuffer;
|
using IndexBuffer = Maxwell3D::Regs::IndexBuffer;
|
||||||
|
@ -58,12 +59,11 @@ private:
|
||||||
|
|
||||||
void DrawIndexSmall(u32 argument);
|
void DrawIndexSmall(u32 argument);
|
||||||
|
|
||||||
void ProcessTopologyOverride();
|
void UpdateTopology();
|
||||||
|
|
||||||
void ProcessDraw(bool draw_indexed, u32 instance_count);
|
void ProcessDraw(bool draw_indexed, u32 instance_count);
|
||||||
|
|
||||||
Maxwell3D* maxwell3d{};
|
Maxwell3D* maxwell3d{};
|
||||||
State draw_state{};
|
State draw_state{};
|
||||||
bool use_topology_override{};
|
|
||||||
};
|
};
|
||||||
} // namespace Tegra::Engines
|
} // namespace Tegra::Engines
|
||||||
|
|
Loading…
Reference in a new issue