2021-02-03 01:07:00 +01:00
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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// This file implements the SSA rewriting algorithm proposed in
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//
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// Simple and Efficient Construction of Static Single Assignment Form.
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2021-07-09 22:11:47 +02:00
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// Braun M., Buchwald S., Hack S., Leiba R., Mallon C., Zwinkau A. (2013)
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2021-02-03 01:07:00 +01:00
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// In: Jhala R., De Bosschere K. (eds)
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// Compiler Construction. CC 2013.
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// Lecture Notes in Computer Science, vol 7791.
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// Springer, Berlin, Heidelberg
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//
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// https://link.springer.com/chapter/10.1007/978-3-642-37051-9_6
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//
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#include <boost/container/flat_map.hpp>
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/frontend/ir/function.h"
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#include "shader_recompiler/frontend/ir/microinstruction.h"
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#include "shader_recompiler/frontend/ir/opcodes.h"
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#include "shader_recompiler/frontend/ir/pred.h"
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#include "shader_recompiler/frontend/ir/reg.h"
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#include "shader_recompiler/ir_opt/passes.h"
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namespace Shader::Optimization {
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namespace {
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using ValueMap = boost::container::flat_map<IR::Block*, IR::Value, std::less<IR::Block*>>;
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2021-02-05 09:58:02 +01:00
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struct FlagTag {};
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struct ZeroFlagTag : FlagTag {};
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struct SignFlagTag : FlagTag {};
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struct CarryFlagTag : FlagTag {};
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struct OverflowFlagTag : FlagTag {};
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2021-02-11 20:39:06 +01:00
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struct GotoVariable : FlagTag {
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GotoVariable() = default;
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explicit GotoVariable(u32 index_) : index{index_} {}
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u32 index;
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};
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2021-02-03 01:07:00 +01:00
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struct DefTable {
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[[nodiscard]] ValueMap& operator[](IR::Reg variable) noexcept {
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return regs[IR::RegIndex(variable)];
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}
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[[nodiscard]] ValueMap& operator[](IR::Pred variable) noexcept {
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return preds[IR::PredIndex(variable)];
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}
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2021-02-11 20:39:06 +01:00
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[[nodiscard]] ValueMap& operator[](GotoVariable goto_variable) {
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return goto_vars[goto_variable.index];
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}
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2021-02-05 09:58:02 +01:00
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[[nodiscard]] ValueMap& operator[](ZeroFlagTag) noexcept {
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return zero_flag;
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}
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[[nodiscard]] ValueMap& operator[](SignFlagTag) noexcept {
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return sign_flag;
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}
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[[nodiscard]] ValueMap& operator[](CarryFlagTag) noexcept {
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return carry_flag;
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}
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[[nodiscard]] ValueMap& operator[](OverflowFlagTag) noexcept {
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return overflow_flag;
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}
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std::array<ValueMap, IR::NUM_USER_REGS> regs;
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std::array<ValueMap, IR::NUM_USER_PREDS> preds;
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boost::container::flat_map<u32, ValueMap> goto_vars;
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ValueMap zero_flag;
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ValueMap sign_flag;
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ValueMap carry_flag;
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ValueMap overflow_flag;
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};
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IR::Opcode UndefOpcode(IR::Reg) noexcept {
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return IR::Opcode::UndefU32;
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}
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IR::Opcode UndefOpcode(IR::Pred) noexcept {
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return IR::Opcode::UndefU1;
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}
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IR::Opcode UndefOpcode(const FlagTag&) noexcept {
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return IR::Opcode::UndefU1;
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}
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[[nodiscard]] bool IsPhi(const IR::Inst& inst) noexcept {
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return inst.Opcode() == IR::Opcode::Phi;
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}
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class Pass {
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public:
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void WriteVariable(auto variable, IR::Block* block, const IR::Value& value) {
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current_def[variable].insert_or_assign(block, value);
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}
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IR::Value ReadVariable(auto variable, IR::Block* block) {
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auto& def{current_def[variable]};
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if (const auto it{def.find(block)}; it != def.end()) {
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return it->second;
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}
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return ReadVariableRecursive(variable, block);
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}
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private:
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IR::Value ReadVariableRecursive(auto variable, IR::Block* block) {
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IR::Value val;
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if (const std::span preds{block->ImmediatePredecessors()}; preds.size() == 1) {
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2021-02-14 05:24:32 +01:00
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// Optimize the common case of one predecessor: no phi needed
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val = ReadVariable(variable, preds.front());
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} else {
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// Break potential cycles with operandless phi
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IR::Inst& phi_inst{*block->PrependNewInst(block->begin(), IR::Opcode::Phi)};
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val = IR::Value{&phi_inst};
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WriteVariable(variable, block, val);
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val = AddPhiOperands(variable, phi_inst, block);
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}
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WriteVariable(variable, block, val);
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return val;
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}
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2021-02-06 06:38:22 +01:00
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IR::Value AddPhiOperands(auto variable, IR::Inst& phi, IR::Block* block) {
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for (IR::Block* const pred : block->ImmediatePredecessors()) {
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phi.AddPhiOperand(pred, ReadVariable(variable, pred));
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}
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return TryRemoveTrivialPhi(phi, block, UndefOpcode(variable));
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}
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2021-02-06 06:38:22 +01:00
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IR::Value TryRemoveTrivialPhi(IR::Inst& phi, IR::Block* block, IR::Opcode undef_opcode) {
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IR::Value same;
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const size_t num_args{phi.NumArgs()};
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for (size_t arg_index = 0; arg_index < num_args; ++arg_index) {
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const IR::Value& op{phi.Arg(arg_index)};
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if (op == same || op == IR::Value{&phi}) {
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// Unique value or self-reference
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continue;
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}
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if (!same.IsEmpty()) {
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// The phi merges at least two values: not trivial
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return IR::Value{&phi};
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}
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same = op;
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}
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if (same.IsEmpty()) {
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// The phi is unreachable or in the start block
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const auto first_not_phi{std::ranges::find_if_not(block->Instructions(), IsPhi)};
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same = IR::Value{&*block->PrependNewInst(first_not_phi, undef_opcode)};
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}
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// Reroute all uses of phi to same and remove phi
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phi.ReplaceUsesWith(same);
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// TODO: Try to recursively remove all phi users, which might have become trivial
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return same;
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}
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DefTable current_def;
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};
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2021-02-14 05:24:32 +01:00
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void VisitInst(Pass& pass, IR::Block* block, IR::Inst& inst) {
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switch (inst.Opcode()) {
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case IR::Opcode::SetRegister:
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if (const IR::Reg reg{inst.Arg(0).Reg()}; reg != IR::Reg::RZ) {
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pass.WriteVariable(reg, block, inst.Arg(1));
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}
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break;
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case IR::Opcode::SetPred:
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if (const IR::Pred pred{inst.Arg(0).Pred()}; pred != IR::Pred::PT) {
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pass.WriteVariable(pred, block, inst.Arg(1));
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}
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break;
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case IR::Opcode::SetGotoVariable:
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pass.WriteVariable(GotoVariable{inst.Arg(0).U32()}, block, inst.Arg(1));
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break;
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case IR::Opcode::SetZFlag:
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pass.WriteVariable(ZeroFlagTag{}, block, inst.Arg(0));
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break;
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case IR::Opcode::SetSFlag:
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pass.WriteVariable(SignFlagTag{}, block, inst.Arg(0));
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break;
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case IR::Opcode::SetCFlag:
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pass.WriteVariable(CarryFlagTag{}, block, inst.Arg(0));
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break;
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case IR::Opcode::SetOFlag:
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pass.WriteVariable(OverflowFlagTag{}, block, inst.Arg(0));
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break;
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case IR::Opcode::GetRegister:
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if (const IR::Reg reg{inst.Arg(0).Reg()}; reg != IR::Reg::RZ) {
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inst.ReplaceUsesWith(pass.ReadVariable(reg, block));
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}
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break;
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case IR::Opcode::GetPred:
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if (const IR::Pred pred{inst.Arg(0).Pred()}; pred != IR::Pred::PT) {
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inst.ReplaceUsesWith(pass.ReadVariable(pred, block));
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}
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break;
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case IR::Opcode::GetGotoVariable:
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inst.ReplaceUsesWith(pass.ReadVariable(GotoVariable{inst.Arg(0).U32()}, block));
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break;
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case IR::Opcode::GetZFlag:
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inst.ReplaceUsesWith(pass.ReadVariable(ZeroFlagTag{}, block));
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break;
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case IR::Opcode::GetSFlag:
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inst.ReplaceUsesWith(pass.ReadVariable(SignFlagTag{}, block));
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break;
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case IR::Opcode::GetCFlag:
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inst.ReplaceUsesWith(pass.ReadVariable(CarryFlagTag{}, block));
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break;
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case IR::Opcode::GetOFlag:
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inst.ReplaceUsesWith(pass.ReadVariable(OverflowFlagTag{}, block));
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break;
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default:
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break;
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}
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}
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2021-02-03 01:07:00 +01:00
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} // Anonymous namespace
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void SsaRewritePass(IR::Function& function) {
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Pass pass;
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for (IR::Block* const block : function.blocks) {
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for (IR::Inst& inst : block->Instructions()) {
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VisitInst(pass, block, inst);
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}
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}
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}
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} // namespace Shader::Optimization
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