From bf3938d56e05dd45a43d7355523340c1e8146b9c Mon Sep 17 00:00:00 2001 From: ShizZy Date: Thu, 19 Sep 2013 23:13:33 -0400 Subject: [PATCH] added mem_map hardware writing --- src/core/src/mem_map.cpp | 25 +------ src/core/src/mem_map.h | 3 + src/core/src/mem_map_funcs.cpp | 123 +++++++++++++++++++-------------- 3 files changed, 76 insertions(+), 75 deletions(-) diff --git a/src/core/src/mem_map.cpp b/src/core/src/mem_map.cpp index 7bab1d4bd0..eab4051eca 100644 --- a/src/core/src/mem_map.cpp +++ b/src/core/src/mem_map.cpp @@ -75,27 +75,6 @@ static MemoryView g_views[] = static const int kNumMemViews = sizeof(g_views) / sizeof(MemoryView); ///< Number of mem views -u8 Read8(const u32 addr) { - return 0xDE; -} - -u16 Read16(const u32 addr) { - return 0xDEAD; -} - -u32 Read32(const u32 addr) { - return 0xDEADBEEF; -} - -void Write8(const u32 addr, const u32 data) { -} - -void Write16(const u32 addr, const u32 data) { -} - -void Write32(const u32 addr, const u32 data) { -} - void Init() { int flags = 0; @@ -104,7 +83,7 @@ void Init() { g_views[i].size = MEM_FCRAM_SIZE; } - INFO_LOG(MEMMAP, "Memory system initialized. RAM at %p (mirror at 0 @ %p)", g_fcram, + NOTICE_LOG(MEMMAP, "Memory system initialized. RAM at %p (mirror at 0 @ %p)", g_fcram, g_physical_fcram); } @@ -113,7 +92,7 @@ void Shutdown() { MemoryMap_Shutdown(g_views, kNumMemViews, flags, &g_arena); g_arena.ReleaseSpace(); g_base = NULL; - INFO_LOG(MEMMAP, "Memory system shut down."); + NOTICE_LOG(MEMMAP, "Memory system shut down."); } diff --git a/src/core/src/mem_map.h b/src/core/src/mem_map.h index 08380ab3ad..38004042e1 100644 --- a/src/core/src/mem_map.h +++ b/src/core/src/mem_map.h @@ -67,6 +67,9 @@ u8 Read8(const u32 addr); u16 Read16(const u32 addr); u32 Read32(const u32 addr); +u32 Read8_ZX(const u32 addr); +u32 Read16_ZX(const u32 addr); + void Write8(const u32 addr, const u32 data); void Write16(const u32 addr, const u32 data); void Write32(const u32 addr, const u32 data); diff --git a/src/core/src/mem_map_funcs.cpp b/src/core/src/mem_map_funcs.cpp index ed367e01f8..d1739d7266 100644 --- a/src/core/src/mem_map_funcs.cpp +++ b/src/core/src/mem_map_funcs.cpp @@ -29,22 +29,22 @@ namespace Memory { /* -u8 *GetPointer(const u32 address) +u8 *GetPointer(const u32 addr) { - if ((address & 0x3E000000) == 0x08000000) { - return g_fcram + (address & MEM_FCRAM_MASK); + if ((addr & 0x3E000000) == 0x08000000) { + return g_fcram + (addr & MEM_FCRAM_MASK); } - else if ((address & 0x3F800000) == 0x04000000) { - return m_pVRAM + (address & VRAM_MASK); + else if ((addr & 0x3F800000) == 0x04000000) { + return m_pVRAM + (addr & VRAM_MASK); } - else if ((address & 0x3F000000) >= 0x08000000 && (address & 0x3F000000) < 0x08000000 + g_MemorySize) { - return m_pRAM + (address & g_MemoryMask); + else if ((addr & 0x3F000000) >= 0x08000000 && (addr & 0x3F000000) < 0x08000000 + g_MemorySize) { + return m_pRAM + (addr & g_MemoryMask); } else { - ERROR_LOG(MEMMAP, "Unknown GetPointer %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); + ERROR_LOG(MEMMAP, "Unknown GetPointer %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); static bool reported = false; if (!reported) { - Reporting::ReportMessage("Unknown GetPointer %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); + Reporting::ReportMessage("Unknown GetPointer %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); reported = true; } if (!g_Config.bIgnoreBadMemAccess) { @@ -56,102 +56,121 @@ u8 *GetPointer(const u32 address) }*/ template -inline void ReadFromHardware(T &var, const u32 address) +inline void ReadFromHardware(T &var, const u32 addr) { // TODO: Figure out the fastest order of tests for both read and write (they are probably different). // TODO: Make sure this represents the mirrors in a correct way. // Could just do a base-relative read, too.... TODO - if ((address & 0x3E000000) == 0x08000000) { - var = *((const T*)&g_fcram[address & MEM_FCRAM_MASK]); + if ((addr & 0x3E000000) == 0x08000000) { + var = *((const T*)&g_fcram[addr & MEM_FCRAM_MASK]); } - /*else if ((address & 0x3F800000) == 0x04000000) { - var = *((const T*)&m_pVRAM[address & VRAM_MASK]); + /*else if ((addr & 0x3F800000) == 0x04000000) { + var = *((const T*)&m_pVRAM[addr & VRAM_MASK]); }*/ else { _assert_msg_(MEMMAP, false, "unknown hardware read"); - // WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); + // WARN_LOG(MEMMAP, "ReadFromHardware: Invalid addr %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); } } template -inline void WriteToHardware(u32 address, const T data) -{ - // Could just do a base-relative write, too.... TODO - - if ((address & 0x3E000000) == 0x08000000) { - *(T*)&g_fcram[address & MEM_FCRAM_MASK] = data; - } - /*else if ((address & 0x3F800000) == 0x04000000) { - *(T*)&m_pVRAM[address & VRAM_MASK] = data; - }*/ - else { +inline void WriteToHardware(u32 addr, const T data) { + NOTICE_LOG(MEMMAP, "Test1 %08X", addr); + // ExeFS:/.code is loaded here: + if ((addr & 0xFFF00000) == 0x00100000) { + // TODO(ShizZy): This is dumb... handle correctly. From 3DBrew: + // http://3dbrew.org/wiki/Memory_layout#ARM11_User-land_memory_regions + // The ExeFS:/.code is loaded here, executables must be loaded to the 0x00100000 region when + // the exheader "special memory" flag is clear. The 0x03F00000-byte size restriction only + // applies when this flag is clear. Executables are usually loaded to 0x14000000 when the + // exheader "special memory" flag is set, however this address can be arbitrary. + *(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data; + NOTICE_LOG(MEMMAP, "Test2"); + // Heap mapped by ControlMemory: + } else if ((addr & 0x3E000000) == 0x08000000) { + // TODO(ShizZy): Writes to this virtual address should be put in physical memory at FCRAM + GSP + // heap size... the following is writing to FCRAM + 0, which is actually supposed to be the + // application's GSP heap + *(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data; + } else if ((addr & 0xFF000000) == 0x14000000) { + _assert_msg_(MEMMAP, false, "umimplemented write to GSP heap"); + } else if ((addr & 0xFFF00000) == 0x1EC00000) { + _assert_msg_(MEMMAP, false, "umimplemented write to IO registers"); + } else if ((addr & 0xFF000000) == 0x1F000000) { + _assert_msg_(MEMMAP, false, "umimplemented write to VRAM"); + } else if ((addr & 0xFFF00000) == 0x1FF00000) { + _assert_msg_(MEMMAP, false, "umimplemented write to DSP memory"); + } else if ((addr & 0xFFFF0000) == 0x1FF80000) { + _assert_msg_(MEMMAP, false, "umimplemented write to Configuration Memory"); + } else if ((addr & 0xFFFFF000) == 0x1FF81000) { + _assert_msg_(MEMMAP, false, "umimplemented write to shared page"); + } else { _assert_msg_(MEMMAP, false, "unknown hardware write"); - // WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); } } -bool IsValidAddress(const u32 address) { - if ((address & 0x3E000000) == 0x08000000) { +bool IsValidAddress(const u32 addr) { + if ((addr & 0x3E000000) == 0x08000000) { return true; - } else if ((address & 0x3F800000) == 0x04000000) { + } else if ((addr & 0x3F800000) == 0x04000000) { return true; - } else if ((address & 0xBFFF0000) == 0x00010000) { + } else if ((addr & 0xBFFF0000) == 0x00010000) { return true; - } else if ((address & 0x3F000000) >= 0x08000000 && (address & 0x3F000000) < 0x08000000 + MEM_FCRAM_MASK) { + } else if ((addr & 0x3F000000) >= 0x08000000 && (addr & 0x3F000000) < 0x08000000 + MEM_FCRAM_MASK) { return true; } else { return false; } } -u8 Read_U8(const u32 _Address) { +u8 Read8(const u32 addr) { u8 _var = 0; - ReadFromHardware(_var, _Address); + ReadFromHardware(_var, addr); return (u8)_var; } -u16 Read_U16(const u32 _Address) { +u16 Read16(const u32 addr) { u16_le _var = 0; - ReadFromHardware(_var, _Address); + ReadFromHardware(_var, addr); return (u16)_var; } -u32 Read_U32(const u32 _Address) { +u32 Read32(const u32 addr) { u32_le _var = 0; - ReadFromHardware(_var, _Address); + ReadFromHardware(_var, addr); return _var; } -u64 Read_U64(const u32 _Address) { +u64 Read64(const u32 addr) { u64_le _var = 0; - ReadFromHardware(_var, _Address); + ReadFromHardware(_var, addr); return _var; } -u32 Read_U8_ZX(const u32 _Address) { - return (u32)Read_U8(_Address); +u32 Read8_ZX(const u32 addr) { + return (u32)Read8(addr); } -u32 Read_U16_ZX(const u32 _Address) { - return (u32)Read_U16(_Address); +u32 Read16_ZX(const u32 addr) { + return (u32)Read16(addr); } -void Write_U8(const u8 _Data, const u32 _Address) { - WriteToHardware(_Address, _Data); +void Write8(const u32 addr, const u8 data) { + WriteToHardware(addr, data); } -void Write_U16(const u16 _Data, const u32 _Address) { - WriteToHardware(_Address, _Data); +void Write16(const u32 addr, const u16 data) { + WriteToHardware(addr, data); } -void Write_U32(const u32 _Data, const u32 _Address) { - WriteToHardware(_Address, _Data); +void Write32(const u32 addr, const u32 data) { + WriteToHardware(addr, data); } -void Write_U64(const u64 _Data, const u32 _Address) { - WriteToHardware(_Address, _Data); +void Write64(const u32 addr, const u64 data) { + WriteToHardware(addr, data); } } // namespace