forked from suyu/suyu
VideoCore: Eliminate an unnecessary copy in the drawcall loop
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parent
bde54333df
commit
f00ada3363
3 changed files with 3 additions and 5 deletions
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@ -251,7 +251,6 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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ASSERT(vertex != -1);
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bool vertex_cache_hit = false;
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Shader::OutputRegisters output_registers;
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if (is_indexed) {
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if (g_debug_context && Pica::g_debug_context->recorder) {
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@ -279,10 +278,9 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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g_debug_context->OnEvent(DebugContext::Event::VertexShaderInvocation,
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(void*)&input);
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g_state.vs.Run(shader_unit, input, loader.GetNumTotalAttributes());
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output_registers = shader_unit.output_registers;
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// Retrieve vertex from register data
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output_vertex = output_registers.ToVertex(regs.vs);
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output_vertex = shader_unit.output_registers.ToVertex(regs.vs);
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if (is_indexed) {
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vertex_cache[vertex_cache_pos] = output_vertex;
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@ -25,7 +25,7 @@ namespace Pica {
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namespace Shader {
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OutputVertex OutputRegisters::ToVertex(const Regs::ShaderConfig& config) {
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OutputVertex OutputRegisters::ToVertex(const Regs::ShaderConfig& config) const {
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// Setup output data
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OutputVertex ret;
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// TODO(neobrain): Under some circumstances, up to 16 attributes may be output. We need to
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@ -85,7 +85,7 @@ struct OutputRegisters {
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alignas(16) Math::Vec4<float24> value[16];
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OutputVertex ToVertex(const Regs::ShaderConfig& config);
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OutputVertex ToVertex(const Regs::ShaderConfig& config) const;
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};
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static_assert(std::is_pod<OutputRegisters>::value, "Structure is not POD");
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