forked from suyu/suyu
Pica: Implement LogicOp function.
This commit is contained in:
bunnei
parent
3b5ff61201
commit
e6ace38815
7 changed files with 135 additions and 8 deletions
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@ -162,6 +162,25 @@ struct Regs {
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ETC1A4 = 13, // compressed
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};
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enum class LogicOp : u32 {
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Clear = 0,
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And = 1,
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AndReverse = 2,
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Copy = 3,
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Set = 4,
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CopyInverted = 5,
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NoOp = 6,
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Invert = 7,
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Nand = 8,
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Or = 9,
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Nor = 10,
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Xor = 11,
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Equiv = 12,
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AndInverted = 13,
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OrReverse = 14,
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OrInverted = 15,
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};
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static unsigned NibblesPerPixel(TextureFormat format) {
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switch (format) {
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case TextureFormat::RGBA8:
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@ -413,12 +432,8 @@ struct Regs {
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} alpha_blending;
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union {
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enum Op {
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Set = 4,
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};
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BitField<0, 4, Op> op;
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} logic_op;
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BitField<0, 4, LogicOp> logic_op;
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};
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union {
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BitField< 0, 8, u32> r;
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@ -873,8 +873,63 @@ static void ProcessTriangleInternal(const VertexShader::OutputVertex& v0,
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blend_output = EvaluateBlendEquation(combiner_output, srcfactor, dest, dstfactor, params.blend_equation_rgb);
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blend_output.a() = EvaluateBlendEquation(combiner_output, srcfactor, dest, dstfactor, params.blend_equation_a).a();
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} else {
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LOG_CRITICAL(HW_GPU, "logic op: %x", output_merger.logic_op);
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UNIMPLEMENTED();
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static auto LogicOp = [](u8 src, u8 dest, Regs::LogicOp op) -> u8 {
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switch (op) {
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case Regs::LogicOp::Clear:
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return 0;
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case Regs::LogicOp::And:
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return src & dest;
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case Regs::LogicOp::AndReverse:
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return src & ~dest;
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case Regs::LogicOp::Copy:
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return src;
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case Regs::LogicOp::Set:
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return 255;
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case Regs::LogicOp::CopyInverted:
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return ~src;
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case Regs::LogicOp::NoOp:
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return dest;
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case Regs::LogicOp::Invert:
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return ~dest;
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case Regs::LogicOp::Nand:
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return ~(src & dest);
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case Regs::LogicOp::Or:
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return src | dest;
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case Regs::LogicOp::Nor:
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return ~(src | dest);
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case Regs::LogicOp::Xor:
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return src ^ dest;
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case Regs::LogicOp::Equiv:
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return ~(src ^ dest);
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case Regs::LogicOp::AndInverted:
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return ~src & dest;
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case Regs::LogicOp::OrReverse:
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return src | ~dest;
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case Regs::LogicOp::OrInverted:
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return ~src | dest;
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}
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};
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blend_output = Math::MakeVec(
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LogicOp(combiner_output.r(), dest.r(), output_merger.logic_op),
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LogicOp(combiner_output.g(), dest.g(), output_merger.logic_op),
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LogicOp(combiner_output.b(), dest.b(), output_merger.logic_op),
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LogicOp(combiner_output.a(), dest.a(), output_merger.logic_op));
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}
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const Math::Vec4<u8> result = {
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@ -135,6 +135,7 @@ void RasterizerOpenGL::Reset() {
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SyncBlendFuncs();
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SyncBlendColor();
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SyncAlphaTest();
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SyncLogicOp();
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SyncStencilTest();
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SyncDepthTest();
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@ -249,6 +250,11 @@ void RasterizerOpenGL::NotifyPicaRegisterChanged(u32 id) {
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SyncDepthTest();
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break;
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// Logic op
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case PICA_REG_INDEX(output_merger.logic_op):
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SyncLogicOp();
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break;
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// TEV stage 0
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case PICA_REG_INDEX(tev_stage0.color_source1):
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SyncTevSources(0, regs.tev_stage0);
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@ -633,6 +639,10 @@ void RasterizerOpenGL::SyncAlphaTest() {
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glUniform1f(uniform_alphatest_ref, regs.output_merger.alpha_test.ref / 255.0f);
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}
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void RasterizerOpenGL::SyncLogicOp() {
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state.logic_op = PicaToGL::LogicOp(Pica::g_state.regs.output_merger.logic_op);
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}
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void RasterizerOpenGL::SyncStencilTest() {
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// TODO: Implement stencil test, mask, and op
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}
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@ -125,6 +125,9 @@ private:
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/// Syncs the alpha test states to match the PICA register
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void SyncAlphaTest();
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/// Syncs the logic op states to match the PICA register
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void SyncLogicOp();
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/// Syncs the stencil test states to match the PICA register
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void SyncStencilTest();
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@ -32,6 +32,8 @@ OpenGLState::OpenGLState() {
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blend.color.blue = 0.0f;
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blend.color.alpha = 0.0f;
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logic_op = GL_COPY;
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for (auto& texture_unit : texture_units) {
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texture_unit.enabled_2d = false;
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texture_unit.texture_2d = 0;
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@ -99,8 +101,13 @@ void OpenGLState::Apply() {
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if (blend.enabled != cur_state.blend.enabled) {
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if (blend.enabled) {
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glEnable(GL_BLEND);
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cur_state.logic_op = GL_COPY;
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glLogicOp(cur_state.logic_op);
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glDisable(GL_COLOR_LOGIC_OP);
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} else {
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glDisable(GL_BLEND);
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glEnable(GL_COLOR_LOGIC_OP);
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}
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}
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@ -118,6 +125,10 @@ void OpenGLState::Apply() {
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glBlendFuncSeparate(blend.src_rgb_func, blend.dst_rgb_func, blend.src_a_func, blend.dst_a_func);
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}
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if (logic_op != cur_state.logic_op) {
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glLogicOp(logic_op);
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}
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// Textures
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for (unsigned texture_index = 0; texture_index < ARRAY_SIZE(texture_units); ++texture_index) {
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if (texture_units[texture_index].enabled_2d != cur_state.texture_units[texture_index].enabled_2d) {
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@ -42,6 +42,8 @@ public:
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} color; // GL_BLEND_COLOR
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} blend;
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GLenum logic_op; // GL_LOGIC_OP_MODE
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// 3 texture units - one for each that is used in PICA fragment shader emulation
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struct {
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bool enabled_2d; // GL_TEXTURE_2D
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@ -71,6 +71,37 @@ inline GLenum BlendFunc(Pica::Regs::BlendFactor factor) {
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return blend_func_table[(unsigned)factor];
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}
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inline GLenum LogicOp(Pica::Regs::LogicOp op) {
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static const GLenum logic_op_table[] = {
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GL_CLEAR, // Clear
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GL_AND, // And
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GL_AND_REVERSE, // AndReverse
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GL_COPY, // Copy
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GL_SET, // Set
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GL_COPY_INVERTED, // CopyInverted
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GL_NOOP, // NoOp
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GL_INVERT, // Invert
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GL_NAND, // Nand
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GL_OR, // Or
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GL_NOR, // Nor
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GL_XOR, // Xor
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GL_EQUIV, // Equiv
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GL_AND_INVERTED, // AndInverted
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GL_OR_REVERSE, // OrReverse
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GL_OR_INVERTED, // OrInverted
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};
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// Range check table for input
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if ((unsigned)op >= ARRAY_SIZE(logic_op_table)) {
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LOG_CRITICAL(Render_OpenGL, "Unknown logic op %d", op);
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UNREACHABLE();
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return GL_COPY;
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}
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return logic_op_table[(unsigned)op];
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}
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inline GLenum CompareFunc(Pica::Regs::CompareFunc func) {
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static const GLenum compare_func_table[] = {
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GL_NEVER, // CompareFunc::Never
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