forked from suyu/suyu
MemMap: Add support for DSP Read & Writes in the memory map
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parent
78bb86293f
commit
d5049cbba5
3 changed files with 12 additions and 2 deletions
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@ -21,6 +21,7 @@ u8* g_heap = nullptr; ///< Application heap (main memory)
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u8* g_heap_linear = nullptr; ///< Linear heap
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u8* g_vram = nullptr; ///< Video memory (VRAM) pointer
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u8* g_shared_mem = nullptr; ///< Shared memory
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u8* g_dsp_mem = nullptr; ///< DSP memory
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u8* g_kernel_mem; ///< Kernel memory
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static u8* physical_bootrom = nullptr; ///< Bootrom physical memory
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@ -32,6 +33,7 @@ static u8* physical_fcram = nullptr; ///< Main physical memory (FCRAM)
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static u8* physical_heap_gsp = nullptr; ///< GSP heap physical memory
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static u8* physical_vram = nullptr; ///< Video physical memory (VRAM)
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static u8* physical_shared_mem = nullptr; ///< Physical shared memory
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static u8* physical_dsp_mem = nullptr; ///< Physical DSP memory
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static u8* physical_kernel_mem; ///< Kernel memory
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// We don't declare the IO region in here since its handled by other means.
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@ -41,6 +43,7 @@ static MemoryView g_views[] = {
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{&g_heap, &physical_fcram, HEAP_VADDR, HEAP_SIZE, MV_IS_PRIMARY_RAM},
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{&g_shared_mem, &physical_shared_mem, SHARED_MEMORY_VADDR, SHARED_MEMORY_SIZE, 0},
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{&g_system_mem, &physical_system_mem, SYSTEM_MEMORY_VADDR, SYSTEM_MEMORY_SIZE, 0},
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{&g_dsp_mem, &physical_dsp_mem, DSP_MEMORY_VADDR, DSP_MEMORY_SIZE, 0},
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{&g_kernel_mem, &physical_kernel_mem, KERNEL_MEMORY_VADDR, KERNEL_MEMORY_SIZE, 0},
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{&g_heap_linear, &physical_heap_gsp, HEAP_LINEAR_VADDR, HEAP_LINEAR_SIZE, 0},
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};
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@ -134,6 +134,7 @@ extern u8* g_heap; ///< Application heap (main memory)
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extern u8* g_vram; ///< Video memory (VRAM)
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extern u8* g_shared_mem; ///< Shared memory
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extern u8* g_kernel_mem; ///< Kernel memory
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extern u8* g_dsp_mem; ///< DSP memory
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extern u8* g_system_mem; ///< System memory
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extern u8* g_exefs_code; ///< ExeFS:/.code is loaded here
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@ -82,6 +82,10 @@ inline void Read(T &var, const VAddr vaddr) {
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} else if ((vaddr >= CONFIG_MEMORY_VADDR) && (vaddr < CONFIG_MEMORY_VADDR_END)) {
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ConfigMem::Read<T>(var, vaddr);
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// DSP memory
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} else if ((vaddr >= DSP_MEMORY_VADDR) && (vaddr < DSP_MEMORY_VADDR_END)) {
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var = *((const T*)&g_dsp_mem[vaddr - DSP_MEMORY_VADDR]);
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// VRAM
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} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
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var = *((const T*)&g_vram[vaddr - VRAM_VADDR]);
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@ -122,8 +126,10 @@ inline void Write(const VAddr vaddr, const T data) {
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} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
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*(T*)&g_vram[vaddr - VRAM_VADDR] = data;
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//} else if ((vaddr & 0xFFF00000) == 0x1FF00000) {
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// _assert_msg_(MEMMAP, false, "umimplemented write to DSP memory");
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// DSP memory
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} else if ((vaddr >= DSP_MEMORY_VADDR) && (vaddr < DSP_MEMORY_VADDR_END)) {
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*(T*)&g_dsp_mem[vaddr - DSP_MEMORY_VADDR] = data;
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//} else if ((vaddr & 0xFFFF0000) == 0x1FF80000) {
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// _assert_msg_(MEMMAP, false, "umimplemented write to Configuration Memory");
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//} else if ((vaddr & 0xFFFFF000) == 0x1FF81000) {
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