forked from suyu/suyu
gl_rasterizer_cache: Use SurfaceParams as a key for surface caching.
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6a28a66832
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c7c379bd19
2 changed files with 71 additions and 42 deletions
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@ -29,29 +29,37 @@ struct FormatTuple {
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bool compressed;
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};
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SurfaceParams::SurfaceParams(const Tegra::Texture::FullTextureInfo& config)
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: addr(config.tic.Address()), is_tiled(config.tic.IsTiled()),
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block_height(is_tiled ? config.tic.BlockHeight() : 0),
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pixel_format(PixelFormatFromTextureFormat(config.tic.format)),
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component_type(ComponentTypeFromTexture(config.tic.r_type.Value())),
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type(GetFormatType(pixel_format)),
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width(Common::AlignUp(config.tic.Width(), GetCompressionFactor(pixel_format))),
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height(Common::AlignUp(config.tic.Height(), GetCompressionFactor(pixel_format))),
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size_in_bytes(SizeInBytes()) {
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/*static*/ SurfaceParams SurfaceParams::CreateForTexture(
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const Tegra::Texture::FullTextureInfo& config) {
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// TODO(Subv): Different types per component are not supported.
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ASSERT(config.tic.r_type.Value() == config.tic.g_type.Value() &&
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config.tic.r_type.Value() == config.tic.b_type.Value() &&
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config.tic.r_type.Value() == config.tic.a_type.Value());
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SurfaceParams params{};
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params.addr = config.tic.Address();
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params.is_tiled = config.tic.IsTiled();
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params.block_height = params.is_tiled ? config.tic.BlockHeight() : 0,
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params.pixel_format = PixelFormatFromTextureFormat(config.tic.format);
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params.component_type = ComponentTypeFromTexture(config.tic.r_type.Value());
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params.type = GetFormatType(params.pixel_format);
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params.width = Common::AlignUp(config.tic.Width(), GetCompressionFactor(params.pixel_format));
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params.height = Common::AlignUp(config.tic.Height(), GetCompressionFactor(params.pixel_format));
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params.size_in_bytes = params.SizeInBytes();
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return params;
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}
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SurfaceParams::SurfaceParams(const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& config)
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: addr(config.Address()), is_tiled(true),
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block_height(Tegra::Texture::TICEntry::DefaultBlockHeight),
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pixel_format(PixelFormatFromRenderTargetFormat(config.format)),
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component_type(ComponentTypeFromRenderTarget(config.format)),
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type(GetFormatType(pixel_format)), width(config.width), height(config.height),
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size_in_bytes(SizeInBytes()) {}
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/*static*/ SurfaceParams SurfaceParams::CreateForFramebuffer(
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const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& config) {
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SurfaceParams params{};
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params.addr = config.Address();
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params.is_tiled = true;
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params.block_height = Tegra::Texture::TICEntry::DefaultBlockHeight;
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params.pixel_format = PixelFormatFromRenderTargetFormat(config.format);
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params.component_type = ComponentTypeFromRenderTarget(config.format);
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params.type = GetFormatType(params.pixel_format);
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params.width = config.width;
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params.height = config.height;
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params.size_in_bytes = params.SizeInBytes();
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return params;
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}
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static constexpr std::array<FormatTuple, SurfaceParams::MaxPixelFormat> tex_format_tuples = {{
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{GL_RGBA8, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8_REV, false}, // ABGR8
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@ -358,7 +366,7 @@ RasterizerCacheOpenGL::RasterizerCacheOpenGL() {
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}
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Surface RasterizerCacheOpenGL::GetTextureSurface(const Tegra::Texture::FullTextureInfo& config) {
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return GetSurface(SurfaceParams(config));
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return GetSurface(SurfaceParams::CreateForTexture(config));
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}
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SurfaceSurfaceRect_Tuple RasterizerCacheOpenGL::GetFramebufferSurfaces(
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@ -369,8 +377,8 @@ SurfaceSurfaceRect_Tuple RasterizerCacheOpenGL::GetFramebufferSurfaces(
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NGLOG_WARNING(Render_OpenGL, "hard-coded for render target 0!");
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// get color and depth surfaces
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SurfaceParams color_params(regs.rt[0]);
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SurfaceParams depth_params = color_params;
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const SurfaceParams color_params{SurfaceParams::CreateForFramebuffer(regs.rt[0])};
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const SurfaceParams depth_params{color_params};
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ASSERT_MSG(!using_depth_fb, "depth buffer is unimplemented");
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@ -423,13 +431,14 @@ Surface RasterizerCacheOpenGL::GetSurface(const SurfaceParams& params) {
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}
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// Check for an exact match in existing surfaces
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auto search = surface_cache.find(params.addr);
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const auto& surface_key{SurfaceKey::Create(params)};
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const auto& search{surface_cache.find(surface_key)};
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Surface surface;
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if (search != surface_cache.end()) {
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surface = search->second;
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} else {
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surface = std::make_shared<CachedSurface>(params);
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surface_cache[params.addr] = surface;
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surface_cache[surface_key] = surface;
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}
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LoadSurface(surface);
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@ -439,10 +448,10 @@ Surface RasterizerCacheOpenGL::GetSurface(const SurfaceParams& params) {
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Surface RasterizerCacheOpenGL::TryFindFramebufferSurface(VAddr cpu_addr) const {
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// Tries to find the GPU address of a framebuffer based on the CPU address. This is because
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// final output framebuffers are specified by CPU address, but internally our GPU cache uses GPU
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// addresses. We iterate through all cached framebuffers, and compare their starting CPU address
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// to the one provided. This is obviously not great, and won't work if the framebuffer overlaps
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// surfaces.
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// final output framebuffers are specified by CPU address, but internally our GPU cache uses
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// GPU addresses. We iterate through all cached framebuffers, and compare their starting CPU
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// address to the one provided. This is obviously not great, and won't work if the
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// framebuffer overlaps surfaces.
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std::vector<Surface> surfaces;
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for (const auto& surface : surface_cache) {
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@ -9,6 +9,7 @@
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#include <memory>
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#include "common/common_types.h"
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#include "common/hash.h"
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#include "common/math_util.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/renderer_opengl/gl_resource_manager.h"
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@ -253,22 +254,41 @@ struct SurfaceParams {
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GetFormatBpp(pixel_format) / CHAR_BIT;
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}
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SurfaceParams(const Tegra::Texture::FullTextureInfo& config);
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SurfaceParams(const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& config);
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VAddr GetCpuAddr() const;
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const Tegra::GPUVAddr addr;
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const bool is_tiled;
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const u32 block_height;
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const PixelFormat pixel_format;
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const ComponentType component_type;
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const SurfaceType type;
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const u32 width;
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const u32 height;
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const size_t size_in_bytes;
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static SurfaceParams CreateForTexture(const Tegra::Texture::FullTextureInfo& config);
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static SurfaceParams CreateForFramebuffer(
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const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& config);
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Tegra::GPUVAddr addr;
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bool is_tiled;
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u32 block_height;
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PixelFormat pixel_format;
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ComponentType component_type;
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SurfaceType type;
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u32 width;
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u32 height;
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size_t size_in_bytes;
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};
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struct SurfaceKey : Common::HashableStruct<SurfaceParams> {
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static SurfaceKey Create(const SurfaceParams& params) {
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SurfaceKey res;
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res.state = params;
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return res;
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}
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};
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namespace std {
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template <>
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struct hash<SurfaceKey> {
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size_t operator()(const SurfaceKey& k) const {
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return k.Hash();
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}
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};
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} // namespace std
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class CachedSurface final {
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public:
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CachedSurface(const SurfaceParams& params);
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@ -317,7 +337,7 @@ public:
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private:
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Surface GetSurface(const SurfaceParams& params);
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std::map<Tegra::GPUVAddr, Surface> surface_cache;
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std::unordered_map<SurfaceKey, Surface> surface_cache;
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OGLFramebuffer read_framebuffer;
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OGLFramebuffer draw_framebuffer;
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};
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