forked from suyu/suyu
Shader Recomnpiler: implement textuzreGrad 3D emulation constant propagation
This commit is contained in:
parent
ae1421265a
commit
c03f0b3c89
8 changed files with 261 additions and 11 deletions
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@ -558,12 +558,15 @@ void EmitImageGradient(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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const IR::Value& coord, const IR::Value& derivatives,
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const IR::Value& coord, const IR::Value& derivatives,
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const IR::Value& offset, const IR::Value& lod_clamp) {
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const IR::Value& offset, const IR::Value& lod_clamp) {
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const auto info{inst.Flags<IR::TextureInstInfo>()};
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const auto info{inst.Flags<IR::TextureInstInfo>()};
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ScopedRegister dpdx, dpdy;
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ScopedRegister dpdx, dpdy, coords;
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const bool multi_component{info.num_derivates > 1 || info.has_lod_clamp};
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const bool multi_component{info.num_derivates > 1 || info.has_lod_clamp};
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if (multi_component) {
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if (multi_component) {
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// Allocate this early to avoid aliasing other registers
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// Allocate this early to avoid aliasing other registers
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dpdx = ScopedRegister{ctx.reg_alloc};
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dpdx = ScopedRegister{ctx.reg_alloc};
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dpdy = ScopedRegister{ctx.reg_alloc};
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dpdy = ScopedRegister{ctx.reg_alloc};
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if (info.num_derivates >= 3) {
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coords = ScopedRegister{ctx.reg_alloc};
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}
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}
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}
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const auto sparse_inst{PrepareSparse(inst)};
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const auto sparse_inst{PrepareSparse(inst)};
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const std::string_view sparse_mod{sparse_inst ? ".SPARSE" : ""};
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const std::string_view sparse_mod{sparse_inst ? ".SPARSE" : ""};
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@ -580,15 +583,27 @@ void EmitImageGradient(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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"MOV.F {}.y,{}.w;",
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"MOV.F {}.y,{}.w;",
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dpdx.reg, derivatives_vec, dpdx.reg, derivatives_vec, dpdy.reg, derivatives_vec,
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dpdx.reg, derivatives_vec, dpdx.reg, derivatives_vec, dpdy.reg, derivatives_vec,
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dpdy.reg, derivatives_vec);
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dpdy.reg, derivatives_vec);
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Register final_coord;
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if (info.num_derivates >= 3) {
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ctx.Add("MOV.F {}.z,{}.x;"
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"MOV.F {}.z,{}.y;",
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dpdx.reg, coord_vec, dpdy.reg, coord_vec);
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ctx.Add("MOV.F {}.x,0;"
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"MOV.F {}.y,0;",
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"MOV.F {}.z,0;", coords.reg, coords.reg, coords.reg);
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final_coord = coords.reg;
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} else {
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final_coord = coord_vec;
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}
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if (info.has_lod_clamp) {
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if (info.has_lod_clamp) {
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const ScalarF32 lod_clamp_value{ctx.reg_alloc.Consume(lod_clamp)};
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const ScalarF32 lod_clamp_value{ctx.reg_alloc.Consume(lod_clamp)};
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ctx.Add("MOV.F {}.w,{};"
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ctx.Add("MOV.F {}.w,{};"
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"TXD.F.LODCLAMP{} {},{},{},{},{},{}{};",
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"TXD.F.LODCLAMP{} {},{},{},{},{},{}{};",
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dpdy.reg, lod_clamp_value, sparse_mod, ret, coord_vec, dpdx.reg, dpdy.reg,
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dpdy.reg, lod_clamp_value, sparse_mod, ret, final_coord, dpdx.reg, dpdy.reg,
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texture, type, offset_vec);
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texture, type, offset_vec);
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} else {
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} else {
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ctx.Add("TXD.F{} {},{},{},{},{},{}{};", sparse_mod, ret, coord_vec, dpdx.reg, dpdy.reg,
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ctx.Add("TXD.F{} {},{},{},{},{},{}{};", sparse_mod, ret, final_coord, dpdx.reg,
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texture, type, offset_vec);
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dpdy.reg, texture, type, offset_vec);
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}
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}
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} else {
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} else {
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ctx.Add("TXD.F{} {},{},{}.x,{}.y,{},{}{};", sparse_mod, ret, coord_vec, derivatives_vec,
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ctx.Add("TXD.F{} {},{},{}.x,{}.y,{},{}{};", sparse_mod, ret, coord_vec, derivatives_vec,
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@ -548,7 +548,7 @@ void EmitImageGradient(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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if (sparse_inst) {
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if (sparse_inst) {
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throw NotImplementedException("EmitImageGradient Sparse");
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throw NotImplementedException("EmitImageGradient Sparse");
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}
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}
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if (!offset.IsEmpty()) {
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if (!offset.IsEmpty() && info.num_derivates <= 2) {
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throw NotImplementedException("EmitImageGradient offset");
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throw NotImplementedException("EmitImageGradient offset");
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}
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}
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const auto texture{Texture(ctx, info, index)};
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const auto texture{Texture(ctx, info, index)};
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@ -556,6 +556,12 @@ void EmitImageGradient(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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const bool multi_component{info.num_derivates > 1 || info.has_lod_clamp};
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const bool multi_component{info.num_derivates > 1 || info.has_lod_clamp};
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const auto derivatives_vec{ctx.var_alloc.Consume(derivatives)};
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const auto derivatives_vec{ctx.var_alloc.Consume(derivatives)};
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if (multi_component) {
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if (multi_component) {
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if (info.num_derivates >= 3) {
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const auto offset_vec{ctx.var_alloc.Consume(offset)};
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ctx.Add("{}=textureGrad({},{},vec3({}.xz, {}.x),vec3({}.yz, {}.y));", texel, texture,
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coords, derivatives_vec, offset_vec, derivatives_vec, offset_vec);
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return;
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}
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ctx.Add("{}=textureGrad({},{},vec2({}.xz),vec2({}.yz));", texel, texture, coords,
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ctx.Add("{}=textureGrad({},{},vec2({}.xz),vec2({}.yz));", texel, texture, coords,
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derivatives_vec, derivatives_vec);
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derivatives_vec, derivatives_vec);
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} else {
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} else {
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@ -42,6 +42,7 @@ union TextureInstInfo {
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BitField<23, 2, u32> gather_component;
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BitField<23, 2, u32> gather_component;
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BitField<25, 2, u32> num_derivates;
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BitField<25, 2, u32> num_derivates;
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BitField<27, 3, ImageFormat> image_format;
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BitField<27, 3, ImageFormat> image_format;
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BitField<30, 1, u32> ndv_is_active;
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};
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};
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static_assert(sizeof(TextureInstInfo) <= sizeof(u32));
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static_assert(sizeof(TextureInstInfo) <= sizeof(u32));
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@ -19,7 +19,7 @@ void TranslatorVisitor::FSWZADD(u64 insn) {
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} const fswzadd{insn};
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} const fswzadd{insn};
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if (fswzadd.ndv != 0) {
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if (fswzadd.ndv != 0) {
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throw NotImplementedException("FSWZADD NDV");
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LOG_WARNING(Shader, "(STUBBED) FSWZADD - NDV mode");
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}
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}
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const IR::F32 src_a{GetFloatReg8(insn)};
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const IR::F32 src_a{GetFloatReg8(insn)};
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@ -16,8 +16,10 @@ void MOV(TranslatorVisitor& v, u64 insn, const IR::U32& src, bool is_mov32i = fa
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BitField<12, 4, u64> mov32i_mask;
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BitField<12, 4, u64> mov32i_mask;
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} const mov{insn};
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} const mov{insn};
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if ((is_mov32i ? mov.mov32i_mask : mov.mask) != 0xf) {
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u64 mask = is_mov32i ? mov.mov32i_mask : mov.mask;
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throw NotImplementedException("Non-full move mask");
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if (mask != 0xf && mask != 0x1) {
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LOG_WARNING(Shader, "(STUBBED) Masked Mov");
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return;
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}
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}
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v.X(mov.dest_reg, src);
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v.X(mov.dest_reg, src);
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}
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}
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@ -209,7 +209,7 @@ void TranslatorVisitor::R2B(u64) {
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}
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}
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void TranslatorVisitor::RAM(u64) {
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void TranslatorVisitor::RAM(u64) {
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ThrowNotImplemented(Opcode::RAM);
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LOG_WARNING(Shader, "(STUBBED) RAM Instruction");
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}
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}
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void TranslatorVisitor::RET(u64) {
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void TranslatorVisitor::RET(u64) {
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@ -221,7 +221,7 @@ void TranslatorVisitor::RTT(u64) {
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}
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}
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void TranslatorVisitor::SAM(u64) {
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void TranslatorVisitor::SAM(u64) {
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ThrowNotImplemented(Opcode::SAM);
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LOG_WARNING(Shader, "(STUBBED) SAM Instruction");
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}
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}
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void TranslatorVisitor::SETCRSPTR(u64) {
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void TranslatorVisitor::SETCRSPTR(u64) {
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@ -172,6 +172,7 @@ void Impl(TranslatorVisitor& v, u64 insn, bool aoffi, Blod blod, bool lc,
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info.is_depth.Assign(tex.dc != 0 ? 1 : 0);
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info.is_depth.Assign(tex.dc != 0 ? 1 : 0);
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info.has_bias.Assign(blod == Blod::LB || blod == Blod::LBA ? 1 : 0);
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info.has_bias.Assign(blod == Blod::LB || blod == Blod::LBA ? 1 : 0);
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info.has_lod_clamp.Assign(lc ? 1 : 0);
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info.has_lod_clamp.Assign(lc ? 1 : 0);
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info.ndv_is_active.Assign(tex.ndv != 0 ? 1 : 0);
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const IR::Value sample{[&]() -> IR::Value {
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const IR::Value sample{[&]() -> IR::Value {
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if (tex.dc == 0) {
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if (tex.dc == 0) {
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@ -10,6 +10,7 @@
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#include "shader_recompiler/environment.h"
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#include "shader_recompiler/environment.h"
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#include "shader_recompiler/exception.h"
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#include "shader_recompiler/exception.h"
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#include "shader_recompiler/frontend/ir/ir_emitter.h"
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#include "shader_recompiler/frontend/ir/ir_emitter.h"
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#include "shader_recompiler/frontend/ir/modifiers.h"
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#include "shader_recompiler/frontend/ir/value.h"
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#include "shader_recompiler/frontend/ir/value.h"
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#include "shader_recompiler/ir_opt/passes.h"
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#include "shader_recompiler/ir_opt/passes.h"
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@ -410,7 +411,49 @@ void FoldSelect(IR::Inst& inst) {
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}
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}
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}
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}
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void FoldFPAdd32(IR::Inst& inst) {
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if (FoldWhenAllImmediates(inst, [](f32 a, f32 b) { return a + b; })) {
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return;
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}
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const IR::Value lhs_value{inst.Arg(0)};
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const IR::Value rhs_value{inst.Arg(1)};
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const auto check_neutral = [](const IR::Value& one_operand) {
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return one_operand.IsImmediate() && std::abs(one_operand.F32()) == 0.0f;
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};
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if (check_neutral(lhs_value)) {
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inst.ReplaceUsesWith(rhs_value);
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}
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if (check_neutral(rhs_value)) {
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inst.ReplaceUsesWith(lhs_value);
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}
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}
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bool FoldDerivateYFromCorrection(IR::Inst& inst) {
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const IR::Value lhs_value{inst.Arg(0)};
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const IR::Value rhs_value{inst.Arg(1)};
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IR::Inst* const lhs_op{lhs_value.InstRecursive()};
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IR::Inst* const rhs_op{rhs_value.InstRecursive()};
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if (lhs_op->GetOpcode() == IR::Opcode::YDirection) {
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if (rhs_op->GetOpcode() != IR::Opcode::DPdyFine) {
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return false;
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}
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inst.ReplaceUsesWith(rhs_value);
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return true;
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}
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if (rhs_op->GetOpcode() != IR::Opcode::YDirection) {
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return false;
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}
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if (lhs_op->GetOpcode() != IR::Opcode::DPdyFine) {
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return false;
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}
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inst.ReplaceUsesWith(lhs_value);
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return true;
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}
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void FoldFPMul32(IR::Inst& inst) {
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void FoldFPMul32(IR::Inst& inst) {
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if (FoldWhenAllImmediates(inst, [](f32 a, f32 b) { return a * b; })) {
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return;
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}
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const auto control{inst.Flags<IR::FpControl>()};
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const auto control{inst.Flags<IR::FpControl>()};
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if (control.no_contraction) {
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if (control.no_contraction) {
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return;
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return;
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@ -421,6 +464,9 @@ void FoldFPMul32(IR::Inst& inst) {
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if (lhs_value.IsImmediate() || rhs_value.IsImmediate()) {
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if (lhs_value.IsImmediate() || rhs_value.IsImmediate()) {
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return;
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return;
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}
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}
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if (FoldDerivateYFromCorrection(inst)) {
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return;
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}
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IR::Inst* const lhs_op{lhs_value.InstRecursive()};
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IR::Inst* const lhs_op{lhs_value.InstRecursive()};
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IR::Inst* const rhs_op{rhs_value.InstRecursive()};
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IR::Inst* const rhs_op{rhs_value.InstRecursive()};
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if (lhs_op->GetOpcode() != IR::Opcode::FPMul32 ||
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if (lhs_op->GetOpcode() != IR::Opcode::FPMul32 ||
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@ -622,7 +668,12 @@ void FoldFSwizzleAdd(IR::Block& block, IR::Inst& inst) {
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}
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}
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const IR::Value value_3{GetThroughCast(inst2->Arg(0).Resolve(), IR::Opcode::BitCastU32F32)};
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const IR::Value value_3{GetThroughCast(inst2->Arg(0).Resolve(), IR::Opcode::BitCastU32F32)};
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if (value_2 != value_3) {
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if (value_2 != value_3) {
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return;
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if (!value_2.IsImmediate() || !value_3.IsImmediate()) {
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return;
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}
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if (Common::BitCast<u32>(value_2.F32()) != value_3.U32()) {
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return;
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}
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}
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}
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const IR::Value index{inst2->Arg(1)};
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const IR::Value index{inst2->Arg(1)};
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const IR::Value clamp{inst2->Arg(2)};
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const IR::Value clamp{inst2->Arg(2)};
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@ -648,6 +699,169 @@ void FoldFSwizzleAdd(IR::Block& block, IR::Inst& inst) {
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}
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}
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}
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}
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bool FindGradient3DDerivates(std::array<IR::Value, 3>& results, IR::Value coord) {
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if (coord.IsImmediate()) {
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return false;
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}
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const auto check_through_shuffle = [](IR::Value input, IR::Value& result) {
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const IR::Value value_1{GetThroughCast(input.Resolve(), IR::Opcode::BitCastF32U32)};
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IR::Inst* const inst2{value_1.InstRecursive()};
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if (inst2->GetOpcode() != IR::Opcode::ShuffleIndex) {
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return false;
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}
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const IR::Value index{inst2->Arg(1).Resolve()};
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const IR::Value clamp{inst2->Arg(2).Resolve()};
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const IR::Value segmentation_mask{inst2->Arg(3).Resolve()};
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if (!index.IsImmediate() || !clamp.IsImmediate() || !segmentation_mask.IsImmediate()) {
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return false;
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}
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if (index.U32() != 3 && clamp.U32() != 3) {
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return false;
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}
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result = GetThroughCast(inst2->Arg(0).Resolve(), IR::Opcode::BitCastU32F32);
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return true;
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};
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IR::Inst* const inst = coord.InstRecursive();
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if (inst->GetOpcode() != IR::Opcode::FSwizzleAdd) {
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return false;
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}
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std::array<IR::Value, 3> temporary_values;
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IR::Value value_1 = inst->Arg(0).Resolve();
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IR::Value value_2 = inst->Arg(1).Resolve();
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IR::Value value_3 = inst->Arg(2).Resolve();
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std::array<u32, 4> swizzles_mask_a{};
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std::array<u32, 4> swizzles_mask_b{};
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const auto resolve_mask = [](std::array<u32, 4>& mask_results, IR::Value mask) {
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u32 value = mask.U32();
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for (size_t i = 0; i < 4; i++) {
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mask_results[i] = (value >> (i * 2)) & 0x3;
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}
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};
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resolve_mask(swizzles_mask_a, value_3);
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size_t coordinate_index = 0;
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const auto resolve_pending = [&](IR::Value resolve_v) {
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IR::Inst* const inst_r = resolve_v.InstRecursive();
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if (inst_r->GetOpcode() != IR::Opcode::FSwizzleAdd) {
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return false;
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}
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if (!check_through_shuffle(inst_r->Arg(0).Resolve(), temporary_values[1])) {
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return false;
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}
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if (!check_through_shuffle(inst_r->Arg(1).Resolve(), temporary_values[2])) {
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return false;
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}
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resolve_mask(swizzles_mask_b, inst_r->Arg(2).Resolve());
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return true;
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};
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if (value_1.IsImmediate() || value_2.IsImmediate()) {
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return false;
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}
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bool should_continue = false;
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if (resolve_pending(value_1)) {
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should_continue = check_through_shuffle(value_2, temporary_values[0]);
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coordinate_index = 0;
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}
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if (resolve_pending(value_2)) {
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should_continue = check_through_shuffle(value_1, temporary_values[0]);
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coordinate_index = 2;
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|
}
|
||||||
|
if (!should_continue) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
// figure which is which
|
||||||
|
size_t zero_mask_a = 0;
|
||||||
|
size_t zero_mask_b = 0;
|
||||||
|
for (size_t i = 0; i < 4; i++) {
|
||||||
|
if (swizzles_mask_a[i] == 2 || swizzles_mask_b[i] == 2) {
|
||||||
|
// last operand can be inversed, we cannot determine a result.
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
zero_mask_a |= static_cast<size_t>(swizzles_mask_a[i] == 3 ? 1 : 0) << i;
|
||||||
|
zero_mask_b |= static_cast<size_t>(swizzles_mask_b[i] == 3 ? 1 : 0) << i;
|
||||||
|
}
|
||||||
|
static constexpr size_t ddx_pattern = 0b1010;
|
||||||
|
static constexpr size_t ddx_pattern_inv = ~ddx_pattern & 0b00001111;
|
||||||
|
if (std::popcount(zero_mask_a) != 2) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
if (std::popcount(zero_mask_b) != 2) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
if (zero_mask_a == zero_mask_b) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
results[0] = temporary_values[coordinate_index];
|
||||||
|
|
||||||
|
if (coordinate_index == 0) {
|
||||||
|
if (zero_mask_b == ddx_pattern || zero_mask_b == ddx_pattern_inv) {
|
||||||
|
results[1] = temporary_values[1];
|
||||||
|
results[2] = temporary_values[2];
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
results[2] = temporary_values[1];
|
||||||
|
results[1] = temporary_values[2];
|
||||||
|
} else {
|
||||||
|
const auto assign_result = [&results](IR::Value temporary_value, size_t mask) {
|
||||||
|
if (mask == ddx_pattern || mask == ddx_pattern_inv) {
|
||||||
|
results[1] = temporary_value;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
results[2] = temporary_value;
|
||||||
|
};
|
||||||
|
assign_result(temporary_values[1], zero_mask_b);
|
||||||
|
assign_result(temporary_values[0], zero_mask_a);
|
||||||
|
}
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
|
void FoldImageSampleImplicitLod(IR::Block& block, IR::Inst& inst) {
|
||||||
|
IR::TextureInstInfo info = inst.Flags<IR::TextureInstInfo>();
|
||||||
|
auto orig_opcode = inst.GetOpcode();
|
||||||
|
if (info.ndv_is_active == 0) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if (info.type != TextureType::Color3D) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
const IR::Value handle{inst.Arg(0)};
|
||||||
|
const IR::Value coords{inst.Arg(1)};
|
||||||
|
const IR::Value bias_lc{inst.Arg(2)};
|
||||||
|
const IR::Value offset{inst.Arg(3)};
|
||||||
|
if (!offset.IsImmediate()) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
IR::Inst* const inst2 = coords.InstRecursive();
|
||||||
|
std::array<std::array<IR::Value, 3>, 3> results_matrix;
|
||||||
|
for (size_t i = 0; i < 3; i++) {
|
||||||
|
if (!FindGradient3DDerivates(results_matrix[i], inst2->Arg(i).Resolve())) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
IR::F32 lod_clamp{};
|
||||||
|
if (info.has_lod_clamp != 0) {
|
||||||
|
if (!bias_lc.IsImmediate()) {
|
||||||
|
lod_clamp = IR::F32{bias_lc.InstRecursive()->Arg(1).Resolve()};
|
||||||
|
} else {
|
||||||
|
lod_clamp = IR::F32{bias_lc};
|
||||||
|
}
|
||||||
|
}
|
||||||
|
IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
|
||||||
|
IR::Value new_coords =
|
||||||
|
ir.CompositeConstruct(results_matrix[0][0], results_matrix[1][0], results_matrix[2][0]);
|
||||||
|
IR::Value derivatives_1 = ir.CompositeConstruct(results_matrix[0][1], results_matrix[0][2],
|
||||||
|
results_matrix[1][1], results_matrix[1][2]);
|
||||||
|
IR::Value derivatives_2 = ir.CompositeConstruct(results_matrix[2][1], results_matrix[2][2]);
|
||||||
|
info.num_derivates.Assign(3);
|
||||||
|
IR::Value new_gradient_instruction =
|
||||||
|
ir.ImageGradient(handle, new_coords, derivatives_1, derivatives_2, lod_clamp, info);
|
||||||
|
IR::Inst* const new_inst = new_gradient_instruction.InstRecursive();
|
||||||
|
if (orig_opcode == IR::Opcode::ImageSampleImplicitLod) {
|
||||||
|
new_inst->ReplaceOpcode(IR::Opcode::ImageGradient);
|
||||||
|
}
|
||||||
|
inst.ReplaceUsesWith(new_gradient_instruction);
|
||||||
|
}
|
||||||
|
|
||||||
void FoldConstBuffer(Environment& env, IR::Block& block, IR::Inst& inst) {
|
void FoldConstBuffer(Environment& env, IR::Block& block, IR::Inst& inst) {
|
||||||
const IR::Value bank{inst.Arg(0)};
|
const IR::Value bank{inst.Arg(0)};
|
||||||
const IR::Value offset{inst.Arg(1)};
|
const IR::Value offset{inst.Arg(1)};
|
||||||
|
@ -743,6 +957,12 @@ void ConstantPropagation(Environment& env, IR::Block& block, IR::Inst& inst) {
|
||||||
case IR::Opcode::SelectF32:
|
case IR::Opcode::SelectF32:
|
||||||
case IR::Opcode::SelectF64:
|
case IR::Opcode::SelectF64:
|
||||||
return FoldSelect(inst);
|
return FoldSelect(inst);
|
||||||
|
case IR::Opcode::FPNeg32:
|
||||||
|
FoldWhenAllImmediates(inst, [](f32 a) { return -a; });
|
||||||
|
return;
|
||||||
|
case IR::Opcode::FPAdd32:
|
||||||
|
FoldFPAdd32(inst);
|
||||||
|
return;
|
||||||
case IR::Opcode::FPMul32:
|
case IR::Opcode::FPMul32:
|
||||||
return FoldFPMul32(inst);
|
return FoldFPMul32(inst);
|
||||||
case IR::Opcode::LogicalAnd:
|
case IR::Opcode::LogicalAnd:
|
||||||
|
@ -858,6 +1078,11 @@ void ConstantPropagation(Environment& env, IR::Block& block, IR::Inst& inst) {
|
||||||
FoldDriverConstBuffer(env, block, inst, 1);
|
FoldDriverConstBuffer(env, block, inst, 1);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
case IR::Opcode::BindlessImageSampleImplicitLod:
|
||||||
|
case IR::Opcode::BoundImageSampleImplicitLod:
|
||||||
|
case IR::Opcode::ImageSampleImplicitLod:
|
||||||
|
FoldImageSampleImplicitLod(block, inst);
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in a new issue