forked from suyu/suyu
GPU: Implemented the IMNMX shader instruction.
It's similar to the FMNMX instruction but it works on integers.
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81a44d38ee
commit
b0c92b80b1
2 changed files with 31 additions and 3 deletions
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@ -194,6 +194,13 @@ enum class UniformType : u64 {
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Double = 5,
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Double = 5,
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};
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};
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enum class IMinMaxExchange : u64 {
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None = 0,
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XLo = 1,
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XMed = 2,
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XHi = 3,
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};
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union Instruction {
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union Instruction {
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Instruction& operator=(const Instruction& instr) {
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Instruction& operator=(const Instruction& instr) {
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value = instr.value;
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value = instr.value;
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@ -278,6 +285,13 @@ union Instruction {
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BitField<49, 1, u64> negate_a;
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BitField<49, 1, u64> negate_a;
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} alu_integer;
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} alu_integer;
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union {
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BitField<39, 3, u64> pred;
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BitField<42, 1, u64> negate_pred;
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BitField<43, 2, IMinMaxExchange> exchange;
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BitField<48, 1, u64> is_signed;
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} imnmx;
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union {
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union {
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BitField<54, 1, u64> saturate;
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BitField<54, 1, u64> saturate;
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BitField<56, 1, u64> negate_a;
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BitField<56, 1, u64> negate_a;
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@ -682,9 +696,9 @@ private:
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INST("0100110001100---", Id::FMNMX_C, Type::Arithmetic, "FMNMX_C"),
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INST("0100110001100---", Id::FMNMX_C, Type::Arithmetic, "FMNMX_C"),
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INST("0101110001100---", Id::FMNMX_R, Type::Arithmetic, "FMNMX_R"),
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INST("0101110001100---", Id::FMNMX_R, Type::Arithmetic, "FMNMX_R"),
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INST("0011100-01100---", Id::FMNMX_IMM, Type::Arithmetic, "FMNMX_IMM"),
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INST("0011100-01100---", Id::FMNMX_IMM, Type::Arithmetic, "FMNMX_IMM"),
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INST("0100110000100---", Id::IMNMX_C, Type::Arithmetic, "FMNMX_IMM"),
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INST("0100110000100---", Id::IMNMX_C, Type::ArithmeticInteger, "IMNMX_C"),
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INST("0101110000100---", Id::IMNMX_R, Type::Arithmetic, "FMNMX_IMM"),
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INST("0101110000100---", Id::IMNMX_R, Type::ArithmeticInteger, "IMNMX_R"),
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INST("0011100-00100---", Id::IMNMX_IMM, Type::Arithmetic, "FMNMX_IMM"),
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INST("0011100-00100---", Id::IMNMX_IMM, Type::ArithmeticInteger, "IMNMX_IMM"),
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INST("0100110000000---", Id::BFE_C, Type::Bfe, "BFE_C"),
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INST("0100110000000---", Id::BFE_C, Type::Bfe, "BFE_C"),
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INST("0101110000000---", Id::BFE_R, Type::Bfe, "BFE_R"),
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INST("0101110000000---", Id::BFE_R, Type::Bfe, "BFE_R"),
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INST("0011100-00000---", Id::BFE_IMM, Type::Bfe, "BFE_IMM"),
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INST("0011100-00000---", Id::BFE_IMM, Type::Bfe, "BFE_IMM"),
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@ -1127,6 +1127,20 @@ private:
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WriteLogicOperation(instr.gpr0, instr.alu.lop.operation, op_a, op_b);
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WriteLogicOperation(instr.gpr0, instr.alu.lop.operation, op_a, op_b);
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break;
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break;
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}
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}
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case OpCode::Id::IMNMX_C:
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case OpCode::Id::IMNMX_R:
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case OpCode::Id::IMNMX_IMM: {
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ASSERT_MSG(instr.imnmx.exchange == Tegra::Shader::IMinMaxExchange::None,
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"Unimplemented");
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std::string condition =
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GetPredicateCondition(instr.imnmx.pred, instr.imnmx.negate_pred != 0);
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std::string parameters = op_a + ',' + op_b;
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regs.SetRegisterToInteger(instr.gpr0, instr.imnmx.is_signed, 0,
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'(' + condition + ") ? min(" + parameters + ") : max(" +
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parameters + ')',
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1, 1);
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break;
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}
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default: {
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default: {
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LOG_CRITICAL(HW_GPU, "Unhandled ArithmeticInteger instruction: {}",
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LOG_CRITICAL(HW_GPU, "Unhandled ArithmeticInteger instruction: {}",
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opcode->GetName());
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opcode->GetName());
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