forked from suyu/suyu
Merge pull request #2921 from jroweboy/batch-fix-2
GPU: Add draw for immediate and batch modes
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commit
93930a966f
1 changed files with 17 additions and 12 deletions
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@ -243,6 +243,15 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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ASSERT(!g_state.geometry_pipeline.NeedIndexInput());
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g_state.geometry_pipeline.Setup(shader_engine);
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g_state.geometry_pipeline.SubmitVertex(output);
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// TODO: If drawing after every immediate mode triangle kills performance,
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// change it to flush triangles whenever a drawing config register changes
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// See: https://github.com/citra-emu/citra/pull/2866#issuecomment-327011550
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VideoCore::g_renderer->Rasterizer()->DrawTriangles();
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if (g_debug_context) {
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g_debug_context->OnEvent(DebugContext::Event::FinishedPrimitiveBatch,
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nullptr);
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}
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}
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}
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}
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@ -250,16 +259,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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}
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case PICA_REG_INDEX(pipeline.gpu_mode):
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if (regs.pipeline.gpu_mode == PipelineRegs::GPUMode::Configuring) {
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MICROPROFILE_SCOPE(GPU_Drawing);
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// Draw immediate mode triangles when GPU Mode is set to GPUMode::Configuring
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VideoCore::g_renderer->Rasterizer()->DrawTriangles();
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if (g_debug_context) {
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g_debug_context->OnEvent(DebugContext::Event::FinishedPrimitiveBatch, nullptr);
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}
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}
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// This register likely just enables vertex processing and doesn't need any special handling
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break;
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case PICA_REG_INDEX_WORKAROUND(pipeline.command_buffer.trigger[0], 0x23c):
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@ -398,6 +398,11 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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range.second, range.first);
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}
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VideoCore::g_renderer->Rasterizer()->DrawTriangles();
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if (g_debug_context) {
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g_debug_context->OnEvent(DebugContext::Event::FinishedPrimitiveBatch, nullptr);
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}
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break;
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}
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@ -632,6 +637,6 @@ void ProcessCommandList(const u32* list, u32 size) {
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}
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}
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} // namespace
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} // namespace CommandProcessor
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} // namespace
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} // namespace Pica
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