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Common: Get rid of alignment macros

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The gl rasterizer already uses alignas,
so we may as well move everything over.
This commit is contained in:
Lioncash 2016-03-09 01:28:26 -05:00
parent 58c336b671
commit 88d604383e
2 changed files with 5 additions and 13 deletions
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10
src/common/common_funcs.h
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@ -18,19 +18,11 @@
#define INSERT_PADDING_BYTES(num_bytes) u8 CONCAT2(pad, __LINE__)[(num_bytes)] #define INSERT_PADDING_BYTES(num_bytes) u8 CONCAT2(pad, __LINE__)[(num_bytes)]
#define INSERT_PADDING_WORDS(num_words) u32 CONCAT2(pad, __LINE__)[(num_words)] #define INSERT_PADDING_WORDS(num_words) u32 CONCAT2(pad, __LINE__)[(num_words)]
// Inlining
#ifdef _WIN32 #ifdef _WIN32
// Alignment
#define FORCE_INLINE __forceinline #define FORCE_INLINE __forceinline
#define MEMORY_ALIGNED16(x) __declspec(align(16)) x
#define MEMORY_ALIGNED32(x) __declspec(align(32)) x
#define MEMORY_ALIGNED64(x) __declspec(align(64)) x
#define MEMORY_ALIGNED128(x) __declspec(align(128)) x
#else #else
#define FORCE_INLINE inline __attribute__((always_inline)) #define FORCE_INLINE inline __attribute__((always_inline))
#define MEMORY_ALIGNED16(x) __attribute__((aligned(16))) x
#define MEMORY_ALIGNED32(x) __attribute__((aligned(32))) x
#define MEMORY_ALIGNED64(x) __attribute__((aligned(64))) x
#define MEMORY_ALIGNED128(x) __attribute__((aligned(128))) x
#endif #endif
#ifndef _MSC_VER #ifndef _MSC_VER

8
src/video_core/shader/shader.h
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@ -82,7 +82,7 @@ struct ShaderSetup {
struct { struct {
// The float uniforms are accessed by the shader JIT using SSE instructions, and are // The float uniforms are accessed by the shader JIT using SSE instructions, and are
// therefore required to be 16-byte aligned. // therefore required to be 16-byte aligned.
Math::Vec4<float24> MEMORY_ALIGNED16(f[96]); alignas(16) Math::Vec4<float24> f[96];
std::array<bool, 16> b; std::array<bool, 16> b;
std::array<Math::Vec4<u8>, 4> i; std::array<Math::Vec4<u8>, 4> i;
@ -276,9 +276,9 @@ struct UnitState {
struct Registers { struct Registers {
// The registers are accessed by the shader JIT using SSE instructions, and are therefore // The registers are accessed by the shader JIT using SSE instructions, and are therefore
// required to be 16-byte aligned. // required to be 16-byte aligned.
Math::Vec4<float24> MEMORY_ALIGNED16(input[16]); alignas(16) Math::Vec4<float24> input[16];
Math::Vec4<float24> MEMORY_ALIGNED16(output[16]); alignas(16) Math::Vec4<float24> output[16];
Math::Vec4<float24> MEMORY_ALIGNED16(temporary[16]); alignas(16) Math::Vec4<float24> temporary[16];
} registers; } registers;
static_assert(std::is_pod<Registers>::value, "Structure is not POD"); static_assert(std::is_pod<Registers>::value, "Structure is not POD");