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glasm: Implement 64-bit shifts

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ReinUsesLisp 2021-05-19 17:09:29 -03:00 committed by ameerj
parent d957b3a8fe
commit 291f220be3
2 changed files with 14 additions and 12 deletions
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8
src/shader_recompiler/backend/glasm/emit_glasm_instructions.h
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@ -308,11 +308,13 @@ void EmitINeg64(EmitContext& ctx, IR::Inst& inst, Register value);
void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value);
void EmitIAbs64(EmitContext& ctx, IR::Inst& inst, Register value); void EmitIAbs64(EmitContext& ctx, IR::Inst& inst, Register value);
void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift); void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift);
void EmitShiftLeftLogical64(EmitContext& ctx, Register base, Register shift); void EmitShiftLeftLogical64(EmitContext& ctx, IR::Inst& inst, ScalarRegister base, ScalarU32 shift);
void EmitShiftRightLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift); void EmitShiftRightLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift);
void EmitShiftRightLogical64(EmitContext& ctx, Register base, Register shift); void EmitShiftRightLogical64(EmitContext& ctx, IR::Inst& inst, ScalarRegister base,
ScalarU32 shift);
void EmitShiftRightArithmetic32(EmitContext& ctx, IR::Inst& inst, ScalarS32 base, ScalarS32 shift); void EmitShiftRightArithmetic32(EmitContext& ctx, IR::Inst& inst, ScalarS32 base, ScalarS32 shift);
void EmitShiftRightArithmetic64(EmitContext& ctx, Register base, Register shift); void EmitShiftRightArithmetic64(EmitContext& ctx, IR::Inst& inst, ScalarRegister base,
ScalarS32 shift);
void EmitBitwiseAnd32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); void EmitBitwiseAnd32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b);
void EmitBitwiseOr32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); void EmitBitwiseOr32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b);
void EmitBitwiseXor32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); void EmitBitwiseXor32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b);

18
src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp
View file

@ -75,27 +75,27 @@ void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, Sc
ctx.Add("SHL.U {}.x,{},{};", inst, base, shift); ctx.Add("SHL.U {}.x,{},{};", inst, base, shift);
} }
void EmitShiftLeftLogical64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register base, void EmitShiftLeftLogical64(EmitContext& ctx, IR::Inst& inst, ScalarRegister base,
[[maybe_unused]] Register shift) { ScalarU32 shift) {
throw NotImplementedException("GLASM instruction"); ctx.LongAdd("SHL.U64 {}.x,{},{};", inst, base, shift);
} }
void EmitShiftRightLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift) { void EmitShiftRightLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift) {
ctx.Add("SHR.U {}.x,{},{};", inst, base, shift); ctx.Add("SHR.U {}.x,{},{};", inst, base, shift);
} }
void EmitShiftRightLogical64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register base, void EmitShiftRightLogical64(EmitContext& ctx, IR::Inst& inst, ScalarRegister base,
[[maybe_unused]] Register shift) { ScalarU32 shift) {
throw NotImplementedException("GLASM instruction"); ctx.LongAdd("SHR.U64 {}.x,{},{};", inst, base, shift);
} }
void EmitShiftRightArithmetic32(EmitContext& ctx, IR::Inst& inst, ScalarS32 base, ScalarS32 shift) { void EmitShiftRightArithmetic32(EmitContext& ctx, IR::Inst& inst, ScalarS32 base, ScalarS32 shift) {
ctx.Add("SHR.S {}.x,{},{};", inst, base, shift); ctx.Add("SHR.S {}.x,{},{};", inst, base, shift);
} }
void EmitShiftRightArithmetic64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register base, void EmitShiftRightArithmetic64(EmitContext& ctx, IR::Inst& inst, ScalarRegister base,
[[maybe_unused]] Register shift) { ScalarS32 shift) {
throw NotImplementedException("GLASM instruction"); ctx.LongAdd("SHR.S64 {}.x,{},{};", inst, base, shift);
} }
void EmitBitwiseAnd32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) { void EmitBitwiseAnd32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {