shader: Implement LOP32I
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260743f371
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eeb1efa2d2
2 changed files with 45 additions and 18 deletions
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@ -32,34 +32,51 @@ enum class LogicalOp : u64 {
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}
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}
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void LOP(TranslatorVisitor& v, u64 insn, IR::U32 op_b) {
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void LOP(TranslatorVisitor& v, u64 insn, IR::U32 op_b, bool x, bool cc, bool inv_a, bool inv_b,
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LogicalOp bit_op, std::optional<PredicateOp> pred_op = std::nullopt,
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IR::Pred dest_pred = IR::Pred::PT) {
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union {
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u64 insn;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<8, 8, IR::Reg> src_reg;
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BitField<39, 1, u64> neg_a;
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BitField<40, 1, u64> neg_b;
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BitField<41, 2, LogicalOp> bit_op;
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BitField<43, 1, u64> x;
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BitField<44, 2, PredicateOp> pred_op;
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BitField<48, 3, IR::Pred> pred;
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} const lop{insn};
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if (lop.x != 0) {
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throw NotImplementedException("LOP X");
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if (x) {
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throw NotImplementedException("X");
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}
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if (cc) {
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throw NotImplementedException("CC");
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}
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IR::U32 op_a{v.X(lop.src_reg)};
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if (lop.neg_a != 0) {
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if (inv_a != 0) {
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op_a = v.ir.BitwiseNot(op_a);
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}
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if (lop.neg_b != 0) {
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if (inv_b != 0) {
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op_b = v.ir.BitwiseNot(op_b);
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}
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const IR::U32 result{LogicalOperation(v.ir, op_a, op_b, lop.bit_op)};
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const IR::U1 pred_result{PredicateOperation(v.ir, result, lop.pred_op)};
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const IR::U32 result{LogicalOperation(v.ir, op_a, op_b, bit_op)};
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if (pred_op) {
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const IR::U1 pred_result{PredicateOperation(v.ir, result, *pred_op)};
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v.ir.SetPred(dest_pred, pred_result);
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}
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v.X(lop.dest_reg, result);
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v.ir.SetPred(lop.pred, pred_result);
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}
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void LOP(TranslatorVisitor& v, u64 insn, const IR::U32& op_b) {
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union {
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u64 insn;
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BitField<39, 1, u64> inv_a;
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BitField<40, 1, u64> inv_b;
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BitField<41, 2, LogicalOp> bit_op;
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BitField<43, 1, u64> x;
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BitField<44, 2, PredicateOp> pred_op;
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BitField<47, 1, u64> cc;
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BitField<48, 3, IR::Pred> dest_pred;
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} const lop{insn};
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LOP(v, insn, op_b, lop.x != 0, lop.cc != 0, lop.inv_a != 0, lop.inv_b != 0, lop.bit_op,
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lop.pred_op, lop.dest_pred);
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}
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} // Anonymous namespace
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@ -74,4 +91,18 @@ void TranslatorVisitor::LOP_cbuf(u64 insn) {
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void TranslatorVisitor::LOP_imm(u64 insn) {
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LOP(*this, insn, GetImm20(insn));
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}
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void TranslatorVisitor::LOP32I(u64 insn) {
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union {
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u64 raw;
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BitField<53, 2, LogicalOp> bit_op;
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BitField<57, 1, u64> x;
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BitField<52, 1, u64> cc;
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BitField<55, 1, u64> inv_a;
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BitField<56, 1, u64> inv_b;
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} const lop32i{insn};
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LOP(*this, insn, GetImm32(insn), lop32i.x != 0, lop32i.cc != 0, lop32i.inv_a != 0,
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lop32i.inv_b != 0, lop32i.bit_op);
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}
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} // namespace Shader::Maxwell
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@ -357,10 +357,6 @@ void TranslatorVisitor::LONGJMP(u64) {
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ThrowNotImplemented(Opcode::LONGJMP);
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}
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void TranslatorVisitor::LOP32I(u64) {
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ThrowNotImplemented(Opcode::LOP32I);
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}
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void TranslatorVisitor::MEMBAR(u64) {
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ThrowNotImplemented(Opcode::MEMBAR);
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}
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