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arm_interface: Set TLS address for dynarmic core.

This commit is contained in:
bunnei 2017-09-30 14:16:39 -04:00
parent 8c92435ded
commit 6377585edb
5 changed files with 32 additions and 0 deletions

View file

@ -22,6 +22,9 @@ public:
u64 fpu_registers[64]; u64 fpu_registers[64];
u64 fpscr; u64 fpscr;
u64 fpexc; u64 fpexc;
// TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
VAddr tls_address;
}; };
/** /**
@ -121,6 +124,10 @@ public:
*/ */
virtual void SetCP15Register(CP15Register reg, u32 value) = 0; virtual void SetCP15Register(CP15Register reg, u32 value) = 0;
virtual VAddr GetTlsAddress() const = 0;
virtual void SetTlsAddress(VAddr address) = 0;
/** /**
* Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time) * Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time)
* @param ticks Number of ticks to advance the CPU core * @param ticks Number of ticks to advance the CPU core

View file

@ -157,6 +157,14 @@ void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
interpreter_state->CP15[reg] = value; interpreter_state->CP15[reg] = value;
} }
VAddr ARM_Dynarmic::GetTlsAddress() const {
return jit->TlsAddr();
}
void ARM_Dynarmic::SetTlsAddress(VAddr address) {
jit->TlsAddr() = address;
}
void ARM_Dynarmic::AddTicks(u64 ticks) { void ARM_Dynarmic::AddTicks(u64 ticks) {
down_count -= ticks; down_count -= ticks;
if (down_count < 0) { if (down_count < 0) {
@ -185,6 +193,9 @@ void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
ctx.fpscr = jit->Fpscr(); ctx.fpscr = jit->Fpscr();
ctx.fpexc = interpreter_state->VFP[VFP_FPEXC]; ctx.fpexc = interpreter_state->VFP[VFP_FPEXC];
// TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
ctx.tls_address = jit->TlsAddr();
} }
void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) { void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
@ -198,6 +209,9 @@ void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
jit->SetFpscr(ctx.fpscr); jit->SetFpscr(ctx.fpscr);
interpreter_state->VFP[VFP_FPEXC] = ctx.fpexc; interpreter_state->VFP[VFP_FPEXC] = ctx.fpexc;
// TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
jit->TlsAddr() = ctx.tls_address;
} }
void ARM_Dynarmic::PrepareReschedule() { void ARM_Dynarmic::PrepareReschedule() {

View file

@ -26,6 +26,8 @@ public:
void SetCPSR(u32 cpsr) override; void SetCPSR(u32 cpsr) override;
u32 GetCP15Register(CP15Register reg) override; u32 GetCP15Register(CP15Register reg) override;
void SetCP15Register(CP15Register reg, u32 value) override; void SetCP15Register(CP15Register reg, u32 value) override;
VAddr GetTlsAddress() const override;
void SetTlsAddress(VAddr address) override;
void AddTicks(u64 ticks) override; void AddTicks(u64 ticks) override;

View file

@ -73,6 +73,13 @@ void ARM_DynCom::SetCP15Register(CP15Register reg, u32 value) {
state->CP15[reg] = value; state->CP15[reg] = value;
} }
VAddr ARM_DynCom::GetTlsAddress() const {
return {};
}
void ARM_DynCom::SetTlsAddress(VAddr /*address*/) {
}
void ARM_DynCom::AddTicks(u64 ticks) { void ARM_DynCom::AddTicks(u64 ticks) {
down_count -= ticks; down_count -= ticks;
if (down_count < 0) if (down_count < 0)

View file

@ -29,6 +29,8 @@ public:
void SetCPSR(u32 cpsr) override; void SetCPSR(u32 cpsr) override;
u32 GetCP15Register(CP15Register reg) override; u32 GetCP15Register(CP15Register reg) override;
void SetCP15Register(CP15Register reg, u32 value) override; void SetCP15Register(CP15Register reg, u32 value) override;
VAddr GetTlsAddress() const override;
void SetTlsAddress(VAddr address) override;
void AddTicks(u64 ticks) override; void AddTicks(u64 ticks) override;