shader: Implement SR_LaneId
This commit is contained in:
parent
595806fb1c
commit
45d547af11
7 changed files with 15 additions and 0 deletions
|
@ -71,6 +71,7 @@ void EmitSetMXFlag(EmitContext& ctx);
|
|||
Id EmitWorkgroupId(EmitContext& ctx);
|
||||
Id EmitLocalInvocationId(EmitContext& ctx);
|
||||
Id EmitLoadLocal(EmitContext& ctx, Id word_offset);
|
||||
Id EmitLaneId(EmitContext& ctx);
|
||||
void EmitWriteLocal(EmitContext& ctx, Id word_offset, Id value);
|
||||
Id EmitUndefU1(EmitContext& ctx);
|
||||
Id EmitUndefU8(EmitContext& ctx);
|
||||
|
|
|
@ -303,6 +303,10 @@ Id EmitLocalInvocationId(EmitContext& ctx) {
|
|||
return ctx.OpLoad(ctx.U32[3], ctx.local_invocation_id);
|
||||
}
|
||||
|
||||
Id EmitLaneId(EmitContext& ctx) {
|
||||
return ctx.OpLoad(ctx.U32[1], ctx.subgroup_local_invocation_id);
|
||||
}
|
||||
|
||||
Id EmitLoadLocal(EmitContext& ctx, Id word_offset) {
|
||||
const Id pointer{ctx.OpAccessChain(ctx.private_u32, ctx.local_memory, word_offset)};
|
||||
return ctx.OpLoad(ctx.U32[1], pointer);
|
||||
|
|
|
@ -355,6 +355,10 @@ U32 IREmitter::LocalInvocationIdZ() {
|
|||
return U32{CompositeExtract(Inst(Opcode::LocalInvocationId), 2)};
|
||||
}
|
||||
|
||||
U32 IREmitter::LaneId() {
|
||||
return Inst<U32>(Opcode::LaneId);
|
||||
}
|
||||
|
||||
U32 IREmitter::LoadGlobalU8(const U64& address) {
|
||||
return Inst<U32>(Opcode::LoadGlobalU8, address);
|
||||
}
|
||||
|
|
|
@ -97,6 +97,8 @@ public:
|
|||
[[nodiscard]] U32 LocalInvocationIdY();
|
||||
[[nodiscard]] U32 LocalInvocationIdZ();
|
||||
|
||||
[[nodiscard]] U32 LaneId();
|
||||
|
||||
[[nodiscard]] U32 LoadGlobalU8(const U64& address);
|
||||
[[nodiscard]] U32 LoadGlobalS8(const U64& address);
|
||||
[[nodiscard]] U32 LoadGlobalU16(const U64& address);
|
||||
|
|
|
@ -63,6 +63,7 @@ OPCODE(SetTRFlag, Void, U1,
|
|||
OPCODE(SetMXFlag, Void, U1, )
|
||||
OPCODE(WorkgroupId, U32x3, )
|
||||
OPCODE(LocalInvocationId, U32x3, )
|
||||
OPCODE(LaneId, U32, )
|
||||
|
||||
// Undefined
|
||||
OPCODE(UndefU1, U1, )
|
||||
|
|
|
@ -99,6 +99,8 @@ enum class SpecialRegister : u64 {
|
|||
return ir.Imm32(Common::BitCast<u32>(1.0f));
|
||||
case SpecialRegister::SR_WSCALEFACTOR_Z:
|
||||
return ir.Imm32(Common::BitCast<u32>(1.0f));
|
||||
case SpecialRegister::SR_LANEID:
|
||||
return ir.LaneId();
|
||||
default:
|
||||
throw NotImplementedException("S2R special register {}", special_register);
|
||||
}
|
||||
|
|
|
@ -340,6 +340,7 @@ void VisitUsages(Info& info, IR::Inst& inst) {
|
|||
case IR::Opcode::ShuffleUp:
|
||||
case IR::Opcode::ShuffleDown:
|
||||
case IR::Opcode::ShuffleButterfly:
|
||||
case IR::Opcode::LaneId:
|
||||
info.uses_subgroup_invocation_id = true;
|
||||
break;
|
||||
case IR::Opcode::GetCbufU8:
|
||||
|
|
Loading…
Reference in a new issue