arm_dynarmic: Gut interface until dynarmic is ready for general use.
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d327f66990
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2 changed files with 54 additions and 152 deletions
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@ -1,186 +1,93 @@
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// Copyright 2016 Citra Emulator Project
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// Copyright 2018 Yuzu Emulator Team
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// Licensed under GPLv2 or any later version
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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// Refer to the license.txt file included.
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#include <cstring>
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#include <dynarmic/dynarmic.h>
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#include "common/assert.h"
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#include "common/microprofile.h"
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#include "core/arm/dynarmic/arm_dynarmic.h"
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#include "core/arm/dynarmic/arm_dynarmic.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/hle/kernel/svc.h"
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#include "core/memory.h"
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static void InterpreterFallback(u64 pc, Dynarmic::Jit* jit, void* user_arg) {
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UNIMPLEMENTED_MSG("InterpreterFallback for ARM64 JIT does not exist!");
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}
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static bool IsReadOnlyMemory(u64 vaddr) {
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// TODO(bunnei): ImplementMe
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return false;
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}
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u8 MemoryRead8(const u64 addr) {
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return Memory::Read8(static_cast<VAddr>(addr));
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}
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u16 MemoryRead16(const u64 addr) {
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return Memory::Read16(static_cast<VAddr>(addr));
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}
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u32 MemoryRead32(const u64 addr) {
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return Memory::Read32(static_cast<VAddr>(addr));
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}
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u64 MemoryRead64(const u64 addr) {
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return Memory::Read64(static_cast<VAddr>(addr));
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}
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void MemoryWrite8(const u64 addr, const u8 data) {
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Memory::Write8(static_cast<VAddr>(addr), data);
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}
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void MemoryWrite16(const u64 addr, const u16 data) {
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Memory::Write16(static_cast<VAddr>(addr), data);
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}
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void MemoryWrite32(const u64 addr, const u32 data) {
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Memory::Write32(static_cast<VAddr>(addr), data);
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}
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void MemoryWrite64(const u64 addr, const u64 data) {
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Memory::Write64(static_cast<VAddr>(addr), data);
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}
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static Dynarmic::UserCallbacks GetUserCallbacks(ARM_Interface* interpreter_fallback) {
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Dynarmic::UserCallbacks user_callbacks{};
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user_callbacks.InterpreterFallback = &InterpreterFallback;
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user_callbacks.user_arg = static_cast<void*>(interpreter_fallback);
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user_callbacks.CallSVC = &Kernel::CallSVC;
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user_callbacks.memory.IsReadOnlyMemory = &IsReadOnlyMemory;
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user_callbacks.memory.ReadCode = &MemoryRead32;
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user_callbacks.memory.Read8 = &MemoryRead8;
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user_callbacks.memory.Read16 = &MemoryRead16;
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user_callbacks.memory.Read32 = &MemoryRead32;
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user_callbacks.memory.Read64 = &MemoryRead64;
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user_callbacks.memory.Write8 = &MemoryWrite8;
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user_callbacks.memory.Write16 = &MemoryWrite16;
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user_callbacks.memory.Write32 = &MemoryWrite32;
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user_callbacks.memory.Write64 = &MemoryWrite64;
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//user_callbacks.page_table = Memory::GetCurrentPageTablePointers();
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return user_callbacks;
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}
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ARM_Dynarmic::ARM_Dynarmic() {
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ARM_Dynarmic::ARM_Dynarmic() {
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UNIMPLEMENTED();
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}
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}
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void ARM_Dynarmic::MapBackingMemory(VAddr address, size_t size, u8* memory, Kernel::VMAPermission perms) {
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void ARM_Dynarmic::MapBackingMemory(VAddr /*address*/, size_t /*size*/, u8* /*memory*/,
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Kernel::VMAPermission /*perms*/) {
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UNIMPLEMENTED();
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}
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}
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void ARM_Dynarmic::SetPC(u64 pc) {
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void ARM_Dynarmic::SetPC(u64 /*pc*/) {
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jit->Regs64()[32] = pc;
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UNIMPLEMENTED();
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}
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}
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u64 ARM_Dynarmic::GetPC() const {
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u64 ARM_Dynarmic::GetPC() const {
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return jit->Regs64()[32];
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UNIMPLEMENTED();
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}
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u64 ARM_Dynarmic::GetReg(int index) const {
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return jit->Regs64()[index];
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}
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void ARM_Dynarmic::SetReg(int index, u64 value) {
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jit->Regs64()[index] = value;
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}
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const u128& ARM_Dynarmic::GetExtReg(int index) const {
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return jit->ExtRegs64()[index];
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}
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void ARM_Dynarmic::SetExtReg(int index, u128& value) {
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jit->ExtRegs64()[index] = value;
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}
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u32 ARM_Dynarmic::GetVFPReg(int index) const {
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return {};
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return {};
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}
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}
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void ARM_Dynarmic::SetVFPReg(int index, u32 value) {
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u64 ARM_Dynarmic::GetReg(int /*index*/) const {
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UNIMPLEMENTED();
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return {};
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}
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void ARM_Dynarmic::SetReg(int /*index*/, u64 /*value*/) {
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UNIMPLEMENTED();
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}
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const u128& ARM_Dynarmic::GetExtReg(int /*index*/) const {
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UNIMPLEMENTED();
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static constexpr u128 res{};
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return res;
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}
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void ARM_Dynarmic::SetExtReg(int /*index*/, u128& /*value*/) {
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UNIMPLEMENTED();
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}
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u32 ARM_Dynarmic::GetVFPReg(int /*index*/) const {
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UNIMPLEMENTED();
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return {};
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}
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void ARM_Dynarmic::SetVFPReg(int /*index*/, u32 /*value*/) {
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UNIMPLEMENTED();
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}
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}
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u32 ARM_Dynarmic::GetCPSR() const {
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u32 ARM_Dynarmic::GetCPSR() const {
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return jit->Cpsr();
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UNIMPLEMENTED();
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return {};
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}
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}
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void ARM_Dynarmic::SetCPSR(u32 cpsr) {
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void ARM_Dynarmic::SetCPSR(u32 /*cpsr*/) {
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jit->Cpsr() = cpsr;
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UNIMPLEMENTED();
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}
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}
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VAddr ARM_Dynarmic::GetTlsAddress() const {
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VAddr ARM_Dynarmic::GetTlsAddress() const {
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return jit->TlsAddr();
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UNIMPLEMENTED();
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return {};
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}
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}
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void ARM_Dynarmic::SetTlsAddress(VAddr address) {
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void ARM_Dynarmic::SetTlsAddress(VAddr /*address*/) {
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jit->TlsAddr() = address;
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UNIMPLEMENTED();
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}
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}
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MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64));
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void ARM_Dynarmic::ExecuteInstructions(int /*num_instructions*/) {
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UNIMPLEMENTED();
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void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
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ASSERT(Memory::GetCurrentPageTable() == current_page_table);
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MICROPROFILE_SCOPE(ARM_Jit);
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std::size_t ticks_executed = jit->Run(static_cast<unsigned>(num_instructions));
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CoreTiming::AddTicks(ticks_executed);
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}
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}
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void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
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void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& /*ctx*/) {
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memcpy(ctx.cpu_registers, jit->Regs64().data(), sizeof(ctx.cpu_registers));
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UNIMPLEMENTED();
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memcpy(ctx.fpu_registers, jit->ExtRegs64().data(), sizeof(ctx.fpu_registers));
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ctx.lr = jit->Regs64()[30];
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ctx.sp = jit->Regs64()[31];
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ctx.pc = jit->Regs64()[32];
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ctx.cpsr = jit->Cpsr();
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// TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
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ctx.tls_address = jit->TlsAddr();
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}
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}
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void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
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void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& /*ctx*/) {
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memcpy(jit->Regs64().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
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UNIMPLEMENTED();
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memcpy(jit->ExtRegs64().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
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jit->Regs64()[30] = ctx.lr;
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jit->Regs64()[31] = ctx.sp;
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jit->Regs64()[32] = ctx.pc;
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jit->Cpsr() = ctx.cpsr;
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// TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
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jit->TlsAddr() = ctx.tls_address;
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}
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}
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void ARM_Dynarmic::PrepareReschedule() {
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void ARM_Dynarmic::PrepareReschedule() {
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if (jit->IsExecuting()) {
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UNIMPLEMENTED();
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jit->HaltExecution();
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}
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}
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}
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void ARM_Dynarmic::ClearInstructionCache() {
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void ARM_Dynarmic::ClearInstructionCache() {
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jit->ClearCache();
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UNIMPLEMENTED();
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}
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}
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void ARM_Dynarmic::PageTableChanged() {
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void ARM_Dynarmic::PageTableChanged() {
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current_page_table = Memory::GetCurrentPageTable();
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UNIMPLEMENTED();
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auto iter = jits.find(current_page_table);
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if (iter != jits.end()) {
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jit = iter->second.get();
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return;
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}
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jit = new Dynarmic::Jit(GetUserCallbacks(this), Dynarmic::Arch::ARM64);
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jits.emplace(current_page_table, std::unique_ptr<Dynarmic::Jit>(jit));
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}
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}
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@ -1,4 +1,4 @@
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// Copyright 2016 Citra Emulator Project
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// Copyright 2018 Yuzu Emulator Team
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// Licensed under GPLv2 or any later version
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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// Refer to the license.txt file included.
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@ -6,7 +6,6 @@
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#include <map>
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#include <map>
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#include <memory>
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#include <memory>
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#include <dynarmic/dynarmic.h>
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/arm_interface.h"
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@ -18,7 +17,8 @@ class ARM_Dynarmic final : public ARM_Interface {
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public:
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public:
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ARM_Dynarmic();
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ARM_Dynarmic();
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void MapBackingMemory(VAddr address, size_t size, u8* memory, Kernel::VMAPermission perms) override;
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void MapBackingMemory(VAddr address, size_t size, u8* memory,
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Kernel::VMAPermission perms) override;
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void SetPC(u64 pc) override;
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void SetPC(u64 pc) override;
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u64 GetPC() const override;
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u64 GetPC() const override;
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void ClearInstructionCache() override;
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void ClearInstructionCache() override;
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void PageTableChanged() override;
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void PageTableChanged() override;
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private:
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Dynarmic::Jit* jit = nullptr;
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Memory::PageTable* current_page_table = nullptr;
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std::map<Memory::PageTable*, std::unique_ptr<Dynarmic::Jit>> jits;
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};
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};
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