eitan.c/suyu
1
0
Fork 0
forked from suyu/suyu
Code Pull requests Activity

fixed_pipeline_state: Use regular for loop instead of ranges for perf

Browse source 
MSVC generates better code for it.
This commit is contained in:
ReinUsesLisp 2021-06-01 20:37:45 -03:00 committed by ameerj
parent d26271b014
commit 46bd362d0d
1 changed files with 3 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
src/video_core/renderer_vulkan/fixed_pipeline_state.cpp
View file

@ -84,9 +84,10 @@ void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d,
early_z.Assign(regs.force_early_fragment_tests != 0 ? 1 : 0);
depth_enabled.Assign(regs.zeta_enable != 0 ? 1 : 0);
depth_format.Assign(static_cast<u32>(regs.zeta.format));
std::ranges::transform(regs.rt, color_formats.begin(),
[](const auto& rt) { return static_cast<u8>(rt.format); });
for (size_t i = 0; i < regs.rt.size(); ++i) {
color_formats[i] = static_cast<u8>(regs.rt[i].format);
}
alpha_test_ref = Common::BitCast<u32>(regs.alpha_test_ref);
point_size = Common::BitCast<u32>(regs.point_size);