2013-09-18 05:03:54 +02:00
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/* arminit.c -- ARMulator initialization: ARM6 Instruction Emulator.
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Copyright (C) 1994 Advanced RISC Machines Ltd.
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2014-07-24 01:16:40 +02:00
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2013-09-18 05:03:54 +02:00
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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2014-07-24 01:16:40 +02:00
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2013-09-18 05:03:54 +02:00
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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2014-07-24 01:16:40 +02:00
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2013-09-18 05:03:54 +02:00
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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2014-09-11 03:27:14 +02:00
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/skyeye_common/armemu.h"
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2013-09-18 05:03:54 +02:00
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/***************************************************************************\
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* Definitions for the emulator architecture *
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\***************************************************************************/
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2015-01-30 19:24:19 +01:00
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void ARMul_EmulateInit();
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ARMul_State* ARMul_NewState(ARMul_State* state);
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void ARMul_Reset (ARMul_State* state);
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2013-09-18 05:03:54 +02:00
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2014-07-24 01:16:40 +02:00
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unsigned ARMul_MultTable[32] = {
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1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
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10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16
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2013-09-18 05:03:54 +02:00
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};
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2015-02-01 02:34:26 +01:00
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ARMword ARMul_ImmedTable[4096]; // immediate DP LHS values
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char ARMul_BitList[256]; // number of bits in a byte table
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2013-09-18 05:03:54 +02:00
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/***************************************************************************\
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* Call this routine once to set up the emulator's tables. *
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\***************************************************************************/
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2015-01-30 19:24:19 +01:00
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void ARMul_EmulateInit()
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2013-09-18 05:03:54 +02:00
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{
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2014-07-24 01:16:40 +02:00
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unsigned int i, j;
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2013-09-18 05:03:54 +02:00
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2015-02-01 02:34:26 +01:00
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// the values of 12 bit dp rhs's
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for (i = 0; i < 4096; i++) {
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2014-07-24 01:16:40 +02:00
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ARMul_ImmedTable[i] = ROTATER (i & 0xffL, (i >> 7L) & 0x1eL);
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}
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2013-09-18 05:03:54 +02:00
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2015-02-01 02:34:26 +01:00
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// how many bits in LSM
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for (i = 0; i < 256; ARMul_BitList[i++] = 0);
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2014-07-24 01:16:40 +02:00
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for (j = 1; j < 256; j <<= 1)
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for (i = 0; i < 256; i++)
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if ((i & j) > 0)
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ARMul_BitList[i]++;
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2013-09-18 05:03:54 +02:00
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2015-02-01 02:34:26 +01:00
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// you always need 4 times these values
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2014-07-24 01:16:40 +02:00
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for (i = 0; i < 256; i++)
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2015-02-01 02:34:26 +01:00
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ARMul_BitList[i] *= 4;
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2013-09-18 05:03:54 +02:00
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}
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/***************************************************************************\
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* Returns a new instantiation of the ARMulator's state *
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\***************************************************************************/
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2015-01-30 19:24:19 +01:00
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ARMul_State* ARMul_NewState(ARMul_State* state)
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2013-09-18 05:03:54 +02:00
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{
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unsigned i, j;
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memset (state, 0, sizeof (ARMul_State));
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state->Emulate = RUN;
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for (i = 0; i < 16; i++) {
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state->Reg[i] = 0;
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for (j = 0; j < 7; j++)
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state->RegBank[j][i] = 0;
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}
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for (i = 0; i < 7; i++)
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state->Spsr[i] = 0;
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state->Mode = 0;
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state->Debug = FALSE;
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state->VectorCatch = 0;
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state->Aborted = FALSE;
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state->Reseted = FALSE;
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state->Inted = 3;
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state->LastInted = 3;
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2013-09-18 05:03:54 +02:00
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#ifdef ARM61
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state->prog32Sig = LOW;
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state->data32Sig = LOW;
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2013-09-18 05:03:54 +02:00
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#else
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state->prog32Sig = HIGH;
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state->data32Sig = HIGH;
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2013-09-18 05:03:54 +02:00
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#endif
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2014-07-24 01:16:40 +02:00
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state->lateabtSig = HIGH;
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state->bigendSig = LOW;
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2015-01-30 19:24:19 +01:00
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return state;
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2013-09-18 05:03:54 +02:00
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}
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/***************************************************************************\
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* Call this routine to set ARMulator to model a certain processor *
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\***************************************************************************/
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2015-01-30 19:24:19 +01:00
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void ARMul_SelectProcessor(ARMul_State* state, unsigned properties)
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{
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if (properties & ARM_Fix26_Prop) {
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state->prog32Sig = LOW;
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state->data32Sig = LOW;
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} else {
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state->prog32Sig = HIGH;
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state->data32Sig = HIGH;
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}
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2015-02-01 03:44:35 +01:00
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state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) != 0;
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state->is_v5 = (properties & ARM_v5_Prop) != 0;
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state->is_v5e = (properties & ARM_v5e_Prop) != 0;
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state->is_XScale = (properties & ARM_XScale_Prop) != 0;
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state->is_iWMMXt = (properties & ARM_iWMMXt_Prop) != 0;
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state->is_v6 = (properties & ARM_v6_Prop) != 0;
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state->is_ep9312 = (properties & ARM_ep9312_Prop) != 0;
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state->is_pxa27x = (properties & ARM_PXA27X_Prop) != 0;
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state->is_v7 = (properties & ARM_v7_Prop) != 0;
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2014-07-24 01:16:40 +02:00
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/* Only initialse the coprocessor support once we
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know what kind of chip we are dealing with. */
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//ARMul_CoProInit (state);
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2013-09-18 05:03:54 +02:00
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}
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/***************************************************************************\
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* Call this routine to set up the initial machine state (or perform a RESET *
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\***************************************************************************/
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2015-01-30 19:24:19 +01:00
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void ARMul_Reset(ARMul_State* state)
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{
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state->NextInstr = 0;
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if (state->prog32Sig) {
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state->Reg[15] = 0;
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state->Cpsr = INTBITS | SVC32MODE;
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state->Mode = SVC32MODE;
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} else {
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state->Reg[15] = R15INTBITS | SVC26MODE;
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state->Cpsr = INTBITS | SVC26MODE;
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state->Mode = SVC26MODE;
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}
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2015-01-30 19:24:19 +01:00
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2014-07-24 01:16:40 +02:00
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state->Bank = SVCBANK;
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FLUSHPIPE;
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state->EndCondition = 0;
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state->ErrorCode = 0;
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state->NresetSig = HIGH;
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state->NfiqSig = HIGH;
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state->NirqSig = HIGH;
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state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
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state->abortSig = LOW;
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state->AbortAddr = 1;
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state->NumInstrs = 0;
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2013-09-18 05:03:54 +02:00
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}
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