ahmed2007/suyu
1
0
Fork 0
forked from suyu/suyu
Code Pull requests Activity

shader_ir: Add register getter

Browse source
This commit is contained in:
ReinUsesLisp 2018-12-20 22:41:31 -03:00
parent 4aaa2192b9
commit 5e639bfcf6
2 changed files with 9 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
src/video_core/shader/shader_ir.cpp
View file

@ -39,6 +39,13 @@ Node ShaderIR::Immediate(u32 value) {
return StoreNode(ImmediateNode(value)); return StoreNode(ImmediateNode(value));
} }
Node ShaderIR::GetRegister(Register reg) {
if (reg != Register::ZeroIndex) {
used_registers.insert(static_cast<u32>(reg));
}
return StoreNode(GprNode(reg));
}
Node ShaderIR::GetImmediate19(Instruction instr) { Node ShaderIR::GetImmediate19(Instruction instr) {
return Immediate(instr.alu.GetImm20_19()); return Immediate(instr.alu.GetImm20_19());
} }

2
src/video_core/shader/shader_ir.h
View file

@ -610,6 +610,8 @@ private:
return Immediate(*reinterpret_cast<const u32*>(&value)); return Immediate(*reinterpret_cast<const u32*>(&value));
} }
/// Generates a node for a passed register.
Node GetRegister(Tegra::Shader::Register reg);
/// Generates a node representing a 19-bit immediate value /// Generates a node representing a 19-bit immediate value
Node GetImmediate19(Tegra::Shader::Instruction instr); Node GetImmediate19(Tegra::Shader::Instruction instr);
/// Generates a node representing a 32-bit immediate value /// Generates a node representing a 32-bit immediate value