GPU: Remove the broken frame_skip option.

Fixes #1960.

src/citra/config.cpp

@@ -59,7 +59,6 @@ void Config::ReadValues() {
 
     // Core
     Settings::values.use_cpu_jit = sdl2_config->GetBoolean("Core", "use_cpu_jit", true);
-    Settings::values.frame_skip = sdl2_config->GetInteger("Core", "frame_skip", 0);
 
     // Renderer
     Settings::values.use_hw_renderer = sdl2_config->GetBoolean("Renderer", "use_hw_renderer", true);

src/citra/default_ini.h

@@ -42,10 +42,6 @@ pad_circle_modifier_scale =
 # 0: Interpreter (slow), 1 (default): JIT (fast)
 use_cpu_jit =
 
-# The applied frameskip amount. Must be a power of two.
-# 0 (default): No frameskip, 1: x2 frameskip, 2: x4 frameskip, 3: x8 frameskip, etc.
-frame_skip =
-
 [Renderer]
 # Whether to use software or hardware rendering.
 # 0: Software, 1 (default): Hardware

src/citra_qt/config.cpp

@@ -39,7 +39,6 @@ void Config::ReadValues() {
 
     qt_config->beginGroup("Core");
     Settings::values.use_cpu_jit = qt_config->value("use_cpu_jit", true).toBool();
-    Settings::values.frame_skip = qt_config->value("frame_skip", 0).toInt();
     qt_config->endGroup();
 
     qt_config->beginGroup("Renderer");
@@ -146,7 +145,6 @@ void Config::SaveValues() {
 
     qt_config->beginGroup("Core");
     qt_config->setValue("use_cpu_jit", Settings::values.use_cpu_jit);
-    qt_config->setValue("frame_skip", Settings::values.frame_skip);
     qt_config->endGroup();
 
     qt_config->beginGroup("Renderer");

src/core/hw/gpu.cpp

@@ -29,16 +29,12 @@ namespace GPU {
 
 Regs g_regs;
 
-/// True if the current frame was skipped
-bool g_skip_frame;
 /// 268MHz CPU clocks / 60Hz frames per second
 const u64 frame_ticks = 268123480ull / 60;
 /// Event id for CoreTiming
 static int vblank_event;
 /// Total number of frames drawn
 static u64 frame_count;
-/// True if the last frame was skipped
-static bool last_skip_frame;
 
 template <typename T>
 inline void Read(T& var, const u32 raw_addr) {
@@ -519,20 +515,7 @@ template void Write<u8>(u32 addr, const u8 data);
 /// Update hardware
 static void VBlankCallback(u64 userdata, int cycles_late) {
     frame_count++;
-    last_skip_frame = g_skip_frame;
-    g_skip_frame = (frame_count & Settings::values.frame_skip) != 0;
-
-    // Swap buffers based on the frameskip mode, which is a little bit tricky. When
-    // a frame is being skipped, nothing is being rendered to the internal framebuffer(s).
-    // So, we should only swap frames if the last frame was rendered. The rules are:
-    //  - If frameskip == 0 (disabled), always swap buffers
-    //  - If frameskip == 1, swap buffers every other frame (starting from the first frame)
-    //  - If frameskip > 1, swap buffers every frameskip^n frames (starting from the second frame)
-    if ((((Settings::values.frame_skip != 1) ^ last_skip_frame) &&
-         last_skip_frame != g_skip_frame) ||
-        Settings::values.frame_skip == 0) {
     VideoCore::g_renderer->SwapBuffers();
-    }
 
     // Signal to GSP that GPU interrupt has occurred
     // TODO(yuriks): hwtest to determine if PDC0 is for the Top screen and PDC1 for the Sub
@@ -579,8 +562,6 @@ void Init() {
     framebuffer_sub.color_format.Assign(Regs::PixelFormat::RGB8);
     framebuffer_sub.active_fb = 0;
 
-    last_skip_frame = false;
-    g_skip_frame = false;
     frame_count = 0;
 
     vblank_event = CoreTiming::RegisterEvent("GPU::VBlankCallback", VBlankCallback);

src/core/hw/gpu.h

@@ -316,7 +316,6 @@ ASSERT_REG_POSITION(command_processor_config, 0x00638);
 static_assert(sizeof(Regs) == 0x1000 * sizeof(u32), "Invalid total size of register set");
 
 extern Regs g_regs;
-extern bool g_skip_frame;
 
 template <typename T>
 void Read(T& var, const u32 addr);

src/core/settings.h

@@ -78,7 +78,6 @@ struct Values {
 
     // Core
     bool use_cpu_jit;
-    int frame_skip;
 
     // Data Storage
     bool use_virtual_sd;

src/video_core/command_processor.cpp

@@ -52,10 +52,6 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
     if (id >= regs.NumIds())
         return;
 
-    // If we're skipping this frame, only allow trigger IRQ
-    if (GPU::g_skip_frame && id != PICA_REG_INDEX(trigger_irq))
-        return;
-
     // TODO: Figure out how register masking acts on e.g. vs.uniform_setup.set_value
     u32 old_value = regs[id];