2021-02-08 06:54:35 +01:00
|
|
|
// Copyright 2021 yuzu Emulator Project
|
|
|
|
// Licensed under GPLv2 or any later version
|
|
|
|
// Refer to the license.txt file included.
|
|
|
|
|
|
|
|
#include "shader_recompiler/backend/spirv/emit_spirv.h"
|
|
|
|
|
|
|
|
namespace Shader::Backend::SPIRV {
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeConstructU32x2(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeConstructU32x3(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeConstructU32x4(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeExtractU32x2(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
Id EmitCompositeExtractU32x3(EmitContext& ctx, Id vector, u32 index) {
|
2021-02-16 08:10:22 +01:00
|
|
|
return ctx.OpCompositeExtract(ctx.U32[1], vector, index);
|
2021-02-08 06:54:35 +01:00
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeExtractU32x4(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeConstructF16x2(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeConstructF16x3(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeConstructF16x4(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeExtractF16x2(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeExtractF16x3(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeExtractF16x4(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeConstructF32x2(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeConstructF32x3(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeConstructF32x4(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeExtractF32x2(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeExtractF32x3(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeExtractF32x4(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeConstructF64x2(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeConstructF64x3(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeConstructF64x4(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeExtractF64x2(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeExtractF64x3(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
2021-02-17 04:59:28 +01:00
|
|
|
void EmitCompositeExtractF64x4(EmitContext&) {
|
2021-02-08 06:54:35 +01:00
|
|
|
throw NotImplementedException("SPIR-V Instruction");
|
|
|
|
}
|
|
|
|
|
|
|
|
} // namespace Shader::Backend::SPIRV
|