forked from suyu/suyu
477d616f7d
Constant buffer values on the shader IR were using different offsets if the access direct or indirect. cbuf34 has a non-multiplied offset while cbuf36 does. On shader decoding this commit multiplies it by four on cbuf34 queries.
50 lines
No EOL
1.7 KiB
C++
50 lines
No EOL
1.7 KiB
C++
// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/shader/shader_ir.h"
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namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeIntegerSet(BasicBlock& bb, const BasicBlock& code, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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const Node op_a = GetRegister(instr.gpr8);
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const Node op_b = [&]() {
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if (instr.is_b_imm) {
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return Immediate(instr.alu.GetSignedImm20_20());
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} else if (instr.is_b_gpr) {
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return GetRegister(instr.gpr20);
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} else {
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return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
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}
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}();
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// The iset instruction sets a register to 1.0 or -1 (depending on the bf bit) if the condition
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// is true, and to 0 otherwise.
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const Node second_pred = GetPredicate(instr.iset.pred39, instr.iset.neg_pred != 0);
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const Node first_pred =
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GetPredicateComparisonInteger(instr.iset.cond, instr.iset.is_signed, op_a, op_b);
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const OperationCode combiner = GetPredicateCombiner(instr.iset.op);
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const Node predicate = Operation(combiner, first_pred, second_pred);
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const Node true_value = instr.iset.bf ? Immediate(1.0f) : Immediate(-1);
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const Node false_value = instr.iset.bf ? Immediate(0.0f) : Immediate(0);
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const Node value =
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Operation(OperationCode::Select, PRECISE, predicate, true_value, false_value);
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SetRegister(bb, instr.gpr0, value);
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return pc;
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}
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} // namespace VideoCommon::Shader
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