forked from suyu/suyu
383 lines
17 KiB
C++
383 lines
17 KiB
C++
// Copyright 2019 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <array>
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#include <cstring>
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#include <vector>
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "common/microprofile.h"
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#include "video_core/renderer_vulkan/fixed_pipeline_state.h"
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#include "video_core/renderer_vulkan/maxwell_to_vk.h"
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#include "video_core/renderer_vulkan/vk_descriptor_pool.h"
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#include "video_core/renderer_vulkan/vk_device.h"
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#include "video_core/renderer_vulkan/vk_graphics_pipeline.h"
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#include "video_core/renderer_vulkan/vk_pipeline_cache.h"
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#include "video_core/renderer_vulkan/vk_renderpass_cache.h"
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#include "video_core/renderer_vulkan/vk_scheduler.h"
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#include "video_core/renderer_vulkan/vk_update_descriptor.h"
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#include "video_core/renderer_vulkan/wrapper.h"
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namespace Vulkan {
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MICROPROFILE_DECLARE(Vulkan_PipelineCache);
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namespace {
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VkStencilOpState GetStencilFaceState(const FixedPipelineState::StencilFace& face) {
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VkStencilOpState state;
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state.failOp = MaxwellToVK::StencilOp(face.action_stencil_fail);
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state.passOp = MaxwellToVK::StencilOp(face.action_depth_pass);
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state.depthFailOp = MaxwellToVK::StencilOp(face.action_depth_fail);
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state.compareOp = MaxwellToVK::ComparisonOp(face.test_func);
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state.compareMask = 0;
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state.writeMask = 0;
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state.reference = 0;
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return state;
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}
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bool SupportsPrimitiveRestart(VkPrimitiveTopology topology) {
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static constexpr std::array unsupported_topologies = {
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VK_PRIMITIVE_TOPOLOGY_POINT_LIST,
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VK_PRIMITIVE_TOPOLOGY_LINE_LIST,
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VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST,
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VK_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY,
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VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY,
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VK_PRIMITIVE_TOPOLOGY_PATCH_LIST};
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return std::find(std::begin(unsupported_topologies), std::end(unsupported_topologies),
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topology) == std::end(unsupported_topologies);
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}
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} // Anonymous namespace
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VKGraphicsPipeline::VKGraphicsPipeline(const VKDevice& device, VKScheduler& scheduler,
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VKDescriptorPool& descriptor_pool,
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VKUpdateDescriptorQueue& update_descriptor_queue,
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VKRenderPassCache& renderpass_cache,
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const GraphicsPipelineCacheKey& key,
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vk::Span<VkDescriptorSetLayoutBinding> bindings,
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const SPIRVProgram& program)
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: device{device}, scheduler{scheduler}, fixed_state{key.fixed_state}, hash{key.Hash()},
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descriptor_set_layout{CreateDescriptorSetLayout(bindings)},
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descriptor_allocator{descriptor_pool, *descriptor_set_layout},
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update_descriptor_queue{update_descriptor_queue}, layout{CreatePipelineLayout()},
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descriptor_template{CreateDescriptorUpdateTemplate(program)}, modules{CreateShaderModules(
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program)},
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renderpass{renderpass_cache.GetRenderPass(key.renderpass_params)}, pipeline{CreatePipeline(
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key.renderpass_params,
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program)} {}
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VKGraphicsPipeline::~VKGraphicsPipeline() = default;
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VkDescriptorSet VKGraphicsPipeline::CommitDescriptorSet() {
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if (!descriptor_template) {
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return {};
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}
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const auto set = descriptor_allocator.Commit(scheduler.GetFence());
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update_descriptor_queue.Send(*descriptor_template, set);
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return set;
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}
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vk::DescriptorSetLayout VKGraphicsPipeline::CreateDescriptorSetLayout(
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vk::Span<VkDescriptorSetLayoutBinding> bindings) const {
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VkDescriptorSetLayoutCreateInfo ci;
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ci.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO;
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ci.pNext = nullptr;
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ci.flags = 0;
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ci.bindingCount = bindings.size();
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ci.pBindings = bindings.data();
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return device.GetLogical().CreateDescriptorSetLayout(ci);
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}
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vk::PipelineLayout VKGraphicsPipeline::CreatePipelineLayout() const {
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VkPipelineLayoutCreateInfo ci;
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ci.sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO;
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ci.pNext = nullptr;
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ci.flags = 0;
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ci.setLayoutCount = 1;
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ci.pSetLayouts = descriptor_set_layout.address();
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ci.pushConstantRangeCount = 0;
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ci.pPushConstantRanges = nullptr;
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return device.GetLogical().CreatePipelineLayout(ci);
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}
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vk::DescriptorUpdateTemplateKHR VKGraphicsPipeline::CreateDescriptorUpdateTemplate(
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const SPIRVProgram& program) const {
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std::vector<VkDescriptorUpdateTemplateEntry> template_entries;
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u32 binding = 0;
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u32 offset = 0;
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for (const auto& stage : program) {
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if (stage) {
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FillDescriptorUpdateTemplateEntries(stage->entries, binding, offset, template_entries);
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}
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}
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if (template_entries.empty()) {
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// If the shader doesn't use descriptor sets, skip template creation.
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return {};
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}
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VkDescriptorUpdateTemplateCreateInfoKHR ci;
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ci.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_CREATE_INFO_KHR;
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ci.pNext = nullptr;
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ci.flags = 0;
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ci.descriptorUpdateEntryCount = static_cast<u32>(template_entries.size());
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ci.pDescriptorUpdateEntries = template_entries.data();
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ci.templateType = VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET_KHR;
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ci.descriptorSetLayout = *descriptor_set_layout;
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ci.pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS;
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ci.pipelineLayout = *layout;
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ci.set = DESCRIPTOR_SET;
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return device.GetLogical().CreateDescriptorUpdateTemplateKHR(ci);
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}
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std::vector<vk::ShaderModule> VKGraphicsPipeline::CreateShaderModules(
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const SPIRVProgram& program) const {
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VkShaderModuleCreateInfo ci;
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ci.sType = VK_STRUCTURE_TYPE_SHADER_MODULE_CREATE_INFO;
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ci.pNext = nullptr;
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ci.flags = 0;
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std::vector<vk::ShaderModule> modules;
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modules.reserve(Maxwell::MaxShaderStage);
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for (std::size_t i = 0; i < Maxwell::MaxShaderStage; ++i) {
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const auto& stage = program[i];
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if (!stage) {
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continue;
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}
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ci.codeSize = stage->code.size() * sizeof(u32);
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ci.pCode = stage->code.data();
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modules.push_back(device.GetLogical().CreateShaderModule(ci));
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}
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return modules;
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}
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vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpass_params,
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const SPIRVProgram& program) const {
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const auto& vi = fixed_state.vertex_input;
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const auto& ia = fixed_state.input_assembly;
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const auto& ds = fixed_state.depth_stencil;
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const auto& cd = fixed_state.color_blending;
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const auto& ts = fixed_state.tessellation;
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const auto& rs = fixed_state.rasterizer;
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std::vector<VkVertexInputBindingDescription> vertex_bindings;
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std::vector<VkVertexInputBindingDivisorDescriptionEXT> vertex_binding_divisors;
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for (std::size_t i = 0; i < vi.num_bindings; ++i) {
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const auto& binding = vi.bindings[i];
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const bool instanced = binding.divisor != 0;
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const auto rate = instanced ? VK_VERTEX_INPUT_RATE_INSTANCE : VK_VERTEX_INPUT_RATE_VERTEX;
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auto& vertex_binding = vertex_bindings.emplace_back();
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vertex_binding.binding = binding.index;
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vertex_binding.stride = binding.stride;
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vertex_binding.inputRate = rate;
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if (instanced) {
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auto& binding_divisor = vertex_binding_divisors.emplace_back();
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binding_divisor.binding = binding.index;
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binding_divisor.divisor = binding.divisor;
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}
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}
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std::vector<VkVertexInputAttributeDescription> vertex_attributes;
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const auto& input_attributes = program[0]->entries.attributes;
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for (std::size_t i = 0; i < vi.num_attributes; ++i) {
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const auto& attribute = vi.attributes[i];
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if (input_attributes.find(attribute.index) == input_attributes.end()) {
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// Skip attributes not used by the vertex shaders.
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continue;
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}
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auto& vertex_attribute = vertex_attributes.emplace_back();
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vertex_attribute.location = attribute.index;
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vertex_attribute.binding = attribute.buffer;
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vertex_attribute.format = MaxwellToVK::VertexFormat(attribute.type, attribute.size);
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vertex_attribute.offset = attribute.offset;
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}
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VkPipelineVertexInputStateCreateInfo vertex_input_ci;
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vertex_input_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO;
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vertex_input_ci.pNext = nullptr;
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vertex_input_ci.flags = 0;
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vertex_input_ci.vertexBindingDescriptionCount = static_cast<u32>(vertex_bindings.size());
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vertex_input_ci.pVertexBindingDescriptions = vertex_bindings.data();
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vertex_input_ci.vertexAttributeDescriptionCount = static_cast<u32>(vertex_attributes.size());
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vertex_input_ci.pVertexAttributeDescriptions = vertex_attributes.data();
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VkPipelineVertexInputDivisorStateCreateInfoEXT input_divisor_ci;
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input_divisor_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_DIVISOR_STATE_CREATE_INFO_EXT;
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input_divisor_ci.pNext = nullptr;
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input_divisor_ci.vertexBindingDivisorCount = static_cast<u32>(vertex_binding_divisors.size());
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input_divisor_ci.pVertexBindingDivisors = vertex_binding_divisors.data();
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if (!vertex_binding_divisors.empty()) {
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vertex_input_ci.pNext = &input_divisor_ci;
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}
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VkPipelineInputAssemblyStateCreateInfo input_assembly_ci;
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input_assembly_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO;
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input_assembly_ci.pNext = nullptr;
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input_assembly_ci.flags = 0;
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input_assembly_ci.topology = MaxwellToVK::PrimitiveTopology(device, ia.topology);
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input_assembly_ci.primitiveRestartEnable =
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ia.primitive_restart_enable && SupportsPrimitiveRestart(input_assembly_ci.topology);
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VkPipelineTessellationStateCreateInfo tessellation_ci;
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tessellation_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_TESSELLATION_STATE_CREATE_INFO;
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tessellation_ci.pNext = nullptr;
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tessellation_ci.flags = 0;
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tessellation_ci.patchControlPoints = ts.patch_control_points;
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VkPipelineViewportStateCreateInfo viewport_ci;
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viewport_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO;
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viewport_ci.pNext = nullptr;
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viewport_ci.flags = 0;
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viewport_ci.viewportCount = Maxwell::NumViewports;
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viewport_ci.pViewports = nullptr;
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viewport_ci.scissorCount = Maxwell::NumViewports;
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viewport_ci.pScissors = nullptr;
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VkPipelineRasterizationStateCreateInfo rasterization_ci;
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rasterization_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO;
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rasterization_ci.pNext = nullptr;
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rasterization_ci.flags = 0;
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rasterization_ci.depthClampEnable = rs.depth_clamp_enable;
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rasterization_ci.rasterizerDiscardEnable = VK_FALSE;
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rasterization_ci.polygonMode = VK_POLYGON_MODE_FILL;
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rasterization_ci.cullMode =
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rs.cull_enable ? MaxwellToVK::CullFace(rs.cull_face) : VK_CULL_MODE_NONE;
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rasterization_ci.frontFace = MaxwellToVK::FrontFace(rs.front_face);
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rasterization_ci.depthBiasEnable = rs.depth_bias_enable;
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rasterization_ci.depthBiasConstantFactor = 0.0f;
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rasterization_ci.depthBiasClamp = 0.0f;
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rasterization_ci.depthBiasSlopeFactor = 0.0f;
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rasterization_ci.lineWidth = 1.0f;
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VkPipelineMultisampleStateCreateInfo multisample_ci;
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multisample_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO;
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multisample_ci.pNext = nullptr;
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multisample_ci.flags = 0;
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multisample_ci.rasterizationSamples = VK_SAMPLE_COUNT_1_BIT;
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multisample_ci.sampleShadingEnable = VK_FALSE;
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multisample_ci.minSampleShading = 0.0f;
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multisample_ci.pSampleMask = nullptr;
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multisample_ci.alphaToCoverageEnable = VK_FALSE;
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multisample_ci.alphaToOneEnable = VK_FALSE;
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VkPipelineDepthStencilStateCreateInfo depth_stencil_ci;
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depth_stencil_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO;
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depth_stencil_ci.pNext = nullptr;
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depth_stencil_ci.flags = 0;
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depth_stencil_ci.depthTestEnable = ds.depth_test_enable;
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depth_stencil_ci.depthWriteEnable = ds.depth_write_enable;
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depth_stencil_ci.depthCompareOp = ds.depth_test_enable
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? MaxwellToVK::ComparisonOp(ds.depth_test_function)
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: VK_COMPARE_OP_ALWAYS;
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depth_stencil_ci.depthBoundsTestEnable = ds.depth_bounds_enable;
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depth_stencil_ci.stencilTestEnable = ds.stencil_enable;
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depth_stencil_ci.front = GetStencilFaceState(ds.front_stencil);
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depth_stencil_ci.back = GetStencilFaceState(ds.back_stencil);
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depth_stencil_ci.minDepthBounds = 0.0f;
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depth_stencil_ci.maxDepthBounds = 0.0f;
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std::array<VkPipelineColorBlendAttachmentState, Maxwell::NumRenderTargets> cb_attachments;
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const std::size_t num_attachments =
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std::min(cd.attachments_count, renderpass_params.color_attachments.size());
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for (std::size_t i = 0; i < num_attachments; ++i) {
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static constexpr std::array component_table = {
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VK_COLOR_COMPONENT_R_BIT, VK_COLOR_COMPONENT_G_BIT, VK_COLOR_COMPONENT_B_BIT,
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VK_COLOR_COMPONENT_A_BIT};
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const auto& blend = cd.attachments[i];
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VkColorComponentFlags color_components = 0;
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for (std::size_t j = 0; j < component_table.size(); ++j) {
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if (blend.components[j]) {
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color_components |= component_table[j];
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}
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}
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VkPipelineColorBlendAttachmentState& attachment = cb_attachments[i];
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attachment.blendEnable = blend.enable;
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attachment.srcColorBlendFactor = MaxwellToVK::BlendFactor(blend.src_rgb_func);
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attachment.dstColorBlendFactor = MaxwellToVK::BlendFactor(blend.dst_rgb_func);
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attachment.colorBlendOp = MaxwellToVK::BlendEquation(blend.rgb_equation);
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attachment.srcAlphaBlendFactor = MaxwellToVK::BlendFactor(blend.src_a_func);
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attachment.dstAlphaBlendFactor = MaxwellToVK::BlendFactor(blend.dst_a_func);
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attachment.alphaBlendOp = MaxwellToVK::BlendEquation(blend.a_equation);
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attachment.colorWriteMask = color_components;
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}
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VkPipelineColorBlendStateCreateInfo color_blend_ci;
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color_blend_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO;
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color_blend_ci.pNext = nullptr;
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color_blend_ci.flags = 0;
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color_blend_ci.logicOpEnable = VK_FALSE;
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color_blend_ci.logicOp = VK_LOGIC_OP_COPY;
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color_blend_ci.attachmentCount = static_cast<u32>(num_attachments);
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color_blend_ci.pAttachments = cb_attachments.data();
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std::memset(color_blend_ci.blendConstants, 0, sizeof(color_blend_ci.blendConstants));
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static constexpr std::array dynamic_states = {
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VK_DYNAMIC_STATE_VIEWPORT, VK_DYNAMIC_STATE_SCISSOR,
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VK_DYNAMIC_STATE_DEPTH_BIAS, VK_DYNAMIC_STATE_BLEND_CONSTANTS,
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VK_DYNAMIC_STATE_DEPTH_BOUNDS, VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
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VK_DYNAMIC_STATE_STENCIL_WRITE_MASK, VK_DYNAMIC_STATE_STENCIL_REFERENCE};
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VkPipelineDynamicStateCreateInfo dynamic_state_ci;
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dynamic_state_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO;
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dynamic_state_ci.pNext = nullptr;
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dynamic_state_ci.flags = 0;
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dynamic_state_ci.dynamicStateCount = static_cast<u32>(dynamic_states.size());
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dynamic_state_ci.pDynamicStates = dynamic_states.data();
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VkPipelineShaderStageRequiredSubgroupSizeCreateInfoEXT subgroup_size_ci;
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subgroup_size_ci.sType =
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VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_REQUIRED_SUBGROUP_SIZE_CREATE_INFO_EXT;
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subgroup_size_ci.pNext = nullptr;
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subgroup_size_ci.requiredSubgroupSize = GuestWarpSize;
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std::vector<VkPipelineShaderStageCreateInfo> shader_stages;
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std::size_t module_index = 0;
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for (std::size_t stage = 0; stage < Maxwell::MaxShaderStage; ++stage) {
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if (!program[stage]) {
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continue;
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}
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VkPipelineShaderStageCreateInfo& stage_ci = shader_stages.emplace_back();
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stage_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO;
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stage_ci.pNext = nullptr;
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stage_ci.flags = 0;
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stage_ci.stage = MaxwellToVK::ShaderStage(static_cast<Tegra::Engines::ShaderType>(stage));
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stage_ci.module = *modules[module_index++];
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stage_ci.pName = "main";
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stage_ci.pSpecializationInfo = nullptr;
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if (program[stage]->entries.uses_warps && device.IsGuestWarpSizeSupported(stage_ci.stage)) {
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stage_ci.pNext = &subgroup_size_ci;
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}
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}
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VkGraphicsPipelineCreateInfo ci;
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ci.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO;
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ci.pNext = nullptr;
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ci.flags = 0;
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ci.stageCount = static_cast<u32>(shader_stages.size());
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ci.pStages = shader_stages.data();
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ci.pVertexInputState = &vertex_input_ci;
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ci.pInputAssemblyState = &input_assembly_ci;
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ci.pTessellationState = &tessellation_ci;
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ci.pViewportState = &viewport_ci;
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ci.pRasterizationState = &rasterization_ci;
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ci.pMultisampleState = &multisample_ci;
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ci.pDepthStencilState = &depth_stencil_ci;
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ci.pColorBlendState = &color_blend_ci;
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ci.pDynamicState = &dynamic_state_ci;
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ci.layout = *layout;
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ci.renderPass = renderpass;
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ci.subpass = 0;
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ci.basePipelineHandle = nullptr;
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ci.basePipelineIndex = 0;
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return device.GetLogical().CreateGraphicsPipeline(ci);
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}
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} // namespace Vulkan
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