forked from suyu/suyu
477 lines
16 KiB
C++
477 lines
16 KiB
C++
// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <array>
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#include <map>
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#include <memory>
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#include <vector>
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#include <boost/icl/interval_map.hpp>
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#include "common/common_types.h"
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#include "common/hash.h"
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#include "common/math_util.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/renderer_opengl/gl_resource_manager.h"
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#include "video_core/textures/texture.h"
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class CachedSurface;
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using Surface = std::shared_ptr<CachedSurface>;
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using SurfaceSurfaceRect_Tuple = std::tuple<Surface, Surface, MathUtil::Rectangle<u32>>;
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using PageMap = boost::icl::interval_map<u64, int>;
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struct SurfaceParams {
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enum class PixelFormat {
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ABGR8 = 0,
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B5G6R5 = 1,
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A2B10G10R10 = 2,
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A1B5G5R5 = 3,
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R8 = 4,
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RGBA16F = 5,
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R11FG11FB10F = 6,
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RGBA32UI = 7,
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DXT1 = 8,
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DXT23 = 9,
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DXT45 = 10,
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DXN1 = 11, // This is also known as BC4
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BC7U = 12,
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ASTC_2D_4X4 = 13,
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G8R8 = 14,
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MaxColorFormat,
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// DepthStencil formats
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Z24S8 = 15,
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S8Z24 = 16,
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Z32F = 17,
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Z16 = 18,
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MaxDepthStencilFormat,
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Max = MaxDepthStencilFormat,
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Invalid = 255,
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};
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static constexpr size_t MaxPixelFormat = static_cast<size_t>(PixelFormat::Max);
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enum class ComponentType {
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Invalid = 0,
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SNorm = 1,
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UNorm = 2,
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SInt = 3,
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UInt = 4,
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Float = 5,
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};
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enum class SurfaceType {
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ColorTexture = 0,
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Depth = 1,
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DepthStencil = 2,
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Fill = 3,
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Invalid = 4,
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};
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/**
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* Gets the compression factor for the specified PixelFormat. This applies to just the
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* "compressed width" and "compressed height", not the overall compression factor of a
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* compressed image. This is used for maintaining proper surface sizes for compressed
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* texture formats.
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*/
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static constexpr u32 GetCompressionFactor(PixelFormat format) {
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if (format == PixelFormat::Invalid)
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return 0;
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constexpr std::array<u32, MaxPixelFormat> compression_factor_table = {{
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1, // ABGR8
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1, // B5G6R5
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1, // A2B10G10R10
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1, // A1B5G5R5
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1, // R8
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1, // RGBA16F
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1, // R11FG11FB10F
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1, // RGBA32UI
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4, // DXT1
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4, // DXT23
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4, // DXT45
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4, // DXN1
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4, // BC7U
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4, // ASTC_2D_4X4
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1, // G8R8
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1, // Z24S8
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1, // S8Z24
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1, // Z32F
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1, // Z16
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}};
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ASSERT(static_cast<size_t>(format) < compression_factor_table.size());
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return compression_factor_table[static_cast<size_t>(format)];
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}
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static constexpr u32 GetFormatBpp(PixelFormat format) {
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if (format == PixelFormat::Invalid)
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return 0;
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constexpr std::array<u32, MaxPixelFormat> bpp_table = {{
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32, // ABGR8
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16, // B5G6R5
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32, // A2B10G10R10
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16, // A1B5G5R5
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8, // R8
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64, // RGBA16F
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32, // R11FG11FB10F
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128, // RGBA32UI
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64, // DXT1
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128, // DXT23
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128, // DXT45
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64, // DXN1
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128, // BC7U
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32, // ASTC_2D_4X4
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16, // G8R8
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32, // Z24S8
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32, // S8Z24
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32, // Z32F
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16, // Z16
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}};
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ASSERT(static_cast<size_t>(format) < bpp_table.size());
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return bpp_table[static_cast<size_t>(format)];
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}
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u32 GetFormatBpp() const {
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return GetFormatBpp(pixel_format);
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}
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static PixelFormat PixelFormatFromDepthFormat(Tegra::DepthFormat format) {
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switch (format) {
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case Tegra::DepthFormat::S8_Z24_UNORM:
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return PixelFormat::S8Z24;
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case Tegra::DepthFormat::Z24_S8_UNORM:
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return PixelFormat::Z24S8;
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case Tegra::DepthFormat::Z32_FLOAT:
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return PixelFormat::Z32F;
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case Tegra::DepthFormat::Z16_UNORM:
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return PixelFormat::Z16;
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default:
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LOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format));
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UNREACHABLE();
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}
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}
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static PixelFormat PixelFormatFromRenderTargetFormat(Tegra::RenderTargetFormat format) {
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switch (format) {
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case Tegra::RenderTargetFormat::RGBA8_UNORM:
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case Tegra::RenderTargetFormat::RGBA8_SRGB:
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return PixelFormat::ABGR8;
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case Tegra::RenderTargetFormat::RGB10_A2_UNORM:
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return PixelFormat::A2B10G10R10;
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case Tegra::RenderTargetFormat::RGBA16_FLOAT:
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return PixelFormat::RGBA16F;
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case Tegra::RenderTargetFormat::R11G11B10_FLOAT:
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return PixelFormat::R11FG11FB10F;
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case Tegra::RenderTargetFormat::RGBA32_UINT:
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return PixelFormat::RGBA32UI;
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default:
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LOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format));
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UNREACHABLE();
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}
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}
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static PixelFormat PixelFormatFromTextureFormat(Tegra::Texture::TextureFormat format) {
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// TODO(Subv): Properly implement this
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switch (format) {
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case Tegra::Texture::TextureFormat::A8R8G8B8:
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return PixelFormat::ABGR8;
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case Tegra::Texture::TextureFormat::B5G6R5:
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return PixelFormat::B5G6R5;
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case Tegra::Texture::TextureFormat::A2B10G10R10:
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return PixelFormat::A2B10G10R10;
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case Tegra::Texture::TextureFormat::A1B5G5R5:
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return PixelFormat::A1B5G5R5;
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case Tegra::Texture::TextureFormat::R8:
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return PixelFormat::R8;
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case Tegra::Texture::TextureFormat::G8R8:
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return PixelFormat::G8R8;
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case Tegra::Texture::TextureFormat::R16_G16_B16_A16:
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return PixelFormat::RGBA16F;
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case Tegra::Texture::TextureFormat::BF10GF11RF11:
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return PixelFormat::R11FG11FB10F;
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case Tegra::Texture::TextureFormat::R32_G32_B32_A32:
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return PixelFormat::RGBA32UI;
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case Tegra::Texture::TextureFormat::DXT1:
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return PixelFormat::DXT1;
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case Tegra::Texture::TextureFormat::DXT23:
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return PixelFormat::DXT23;
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case Tegra::Texture::TextureFormat::DXT45:
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return PixelFormat::DXT45;
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case Tegra::Texture::TextureFormat::DXN1:
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return PixelFormat::DXN1;
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case Tegra::Texture::TextureFormat::BC7U:
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return PixelFormat::BC7U;
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case Tegra::Texture::TextureFormat::ASTC_2D_4X4:
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return PixelFormat::ASTC_2D_4X4;
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default:
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LOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format));
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UNREACHABLE();
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}
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}
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static Tegra::Texture::TextureFormat TextureFormatFromPixelFormat(PixelFormat format) {
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// TODO(Subv): Properly implement this
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switch (format) {
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case PixelFormat::ABGR8:
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return Tegra::Texture::TextureFormat::A8R8G8B8;
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case PixelFormat::B5G6R5:
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return Tegra::Texture::TextureFormat::B5G6R5;
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case PixelFormat::A2B10G10R10:
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return Tegra::Texture::TextureFormat::A2B10G10R10;
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case PixelFormat::A1B5G5R5:
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return Tegra::Texture::TextureFormat::A1B5G5R5;
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case PixelFormat::R8:
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return Tegra::Texture::TextureFormat::R8;
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case PixelFormat::G8R8:
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return Tegra::Texture::TextureFormat::G8R8;
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case PixelFormat::RGBA16F:
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return Tegra::Texture::TextureFormat::R16_G16_B16_A16;
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case PixelFormat::R11FG11FB10F:
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return Tegra::Texture::TextureFormat::BF10GF11RF11;
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case PixelFormat::RGBA32UI:
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return Tegra::Texture::TextureFormat::R32_G32_B32_A32;
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case PixelFormat::DXT1:
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return Tegra::Texture::TextureFormat::DXT1;
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case PixelFormat::DXT23:
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return Tegra::Texture::TextureFormat::DXT23;
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case PixelFormat::DXT45:
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return Tegra::Texture::TextureFormat::DXT45;
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case PixelFormat::DXN1:
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return Tegra::Texture::TextureFormat::DXN1;
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case PixelFormat::BC7U:
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return Tegra::Texture::TextureFormat::BC7U;
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case PixelFormat::ASTC_2D_4X4:
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return Tegra::Texture::TextureFormat::ASTC_2D_4X4;
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default:
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UNREACHABLE();
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}
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}
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static Tegra::DepthFormat DepthFormatFromPixelFormat(PixelFormat format) {
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switch (format) {
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case PixelFormat::S8Z24:
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return Tegra::DepthFormat::S8_Z24_UNORM;
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case PixelFormat::Z24S8:
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return Tegra::DepthFormat::Z24_S8_UNORM;
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case PixelFormat::Z32F:
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return Tegra::DepthFormat::Z32_FLOAT;
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case PixelFormat::Z16:
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return Tegra::DepthFormat::Z16_UNORM;
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default:
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UNREACHABLE();
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}
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}
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static ComponentType ComponentTypeFromTexture(Tegra::Texture::ComponentType type) {
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// TODO(Subv): Implement more component types
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switch (type) {
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case Tegra::Texture::ComponentType::UNORM:
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return ComponentType::UNorm;
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default:
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LOG_CRITICAL(HW_GPU, "Unimplemented component type={}", static_cast<u32>(type));
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UNREACHABLE();
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}
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}
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static ComponentType ComponentTypeFromRenderTarget(Tegra::RenderTargetFormat format) {
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// TODO(Subv): Implement more render targets
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switch (format) {
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case Tegra::RenderTargetFormat::RGBA8_UNORM:
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case Tegra::RenderTargetFormat::RGBA8_SRGB:
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case Tegra::RenderTargetFormat::RGB10_A2_UNORM:
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return ComponentType::UNorm;
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case Tegra::RenderTargetFormat::RGBA16_FLOAT:
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case Tegra::RenderTargetFormat::R11G11B10_FLOAT:
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return ComponentType::Float;
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case Tegra::RenderTargetFormat::RGBA32_UINT:
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return ComponentType::UInt;
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default:
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LOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format));
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UNREACHABLE();
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}
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}
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static PixelFormat PixelFormatFromGPUPixelFormat(Tegra::FramebufferConfig::PixelFormat format) {
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switch (format) {
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case Tegra::FramebufferConfig::PixelFormat::ABGR8:
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return PixelFormat::ABGR8;
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default:
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LOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format));
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UNREACHABLE();
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}
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}
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static ComponentType ComponentTypeFromDepthFormat(Tegra::DepthFormat format) {
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switch (format) {
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case Tegra::DepthFormat::Z16_UNORM:
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case Tegra::DepthFormat::S8_Z24_UNORM:
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case Tegra::DepthFormat::Z24_S8_UNORM:
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return ComponentType::UNorm;
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case Tegra::DepthFormat::Z32_FLOAT:
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return ComponentType::Float;
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default:
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LOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format));
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UNREACHABLE();
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}
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}
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static SurfaceType GetFormatType(PixelFormat pixel_format) {
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if (static_cast<size_t>(pixel_format) < static_cast<size_t>(PixelFormat::MaxColorFormat)) {
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return SurfaceType::ColorTexture;
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}
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if (static_cast<size_t>(pixel_format) <
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static_cast<size_t>(PixelFormat::MaxDepthStencilFormat)) {
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return SurfaceType::DepthStencil;
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}
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// TODO(Subv): Implement the other formats
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ASSERT(false);
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return SurfaceType::Invalid;
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}
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/// Returns the rectangle corresponding to this surface
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MathUtil::Rectangle<u32> GetRect() const;
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/// Returns the size of this surface in bytes, adjusted for compression
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size_t SizeInBytes() const {
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const u32 compression_factor{GetCompressionFactor(pixel_format)};
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ASSERT(width % compression_factor == 0);
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ASSERT(height % compression_factor == 0);
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return (width / compression_factor) * (height / compression_factor) *
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GetFormatBpp(pixel_format) / CHAR_BIT;
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}
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/// Returns the CPU virtual address for this surface
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VAddr GetCpuAddr() const;
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/// Returns true if the specified region overlaps with this surface's region in Switch memory
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bool IsOverlappingRegion(Tegra::GPUVAddr region_addr, size_t region_size) const {
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return addr <= (region_addr + region_size) && region_addr <= (addr + size_in_bytes);
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}
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/// Creates SurfaceParams from a texture configuration
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static SurfaceParams CreateForTexture(const Tegra::Texture::FullTextureInfo& config);
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/// Creates SurfaceParams from a framebuffer configuration
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static SurfaceParams CreateForFramebuffer(
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const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& config);
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/// Creates SurfaceParams for a depth buffer configuration
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static SurfaceParams CreateForDepthBuffer(
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const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& config,
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Tegra::GPUVAddr zeta_address, Tegra::DepthFormat format);
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Tegra::GPUVAddr addr;
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bool is_tiled;
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u32 block_height;
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PixelFormat pixel_format;
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ComponentType component_type;
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SurfaceType type;
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u32 width;
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u32 height;
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u32 unaligned_height;
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size_t size_in_bytes;
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};
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/// Hashable variation of SurfaceParams, used for a key in the surface cache
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struct SurfaceKey : Common::HashableStruct<SurfaceParams> {
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static SurfaceKey Create(const SurfaceParams& params) {
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SurfaceKey res;
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res.state = params;
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return res;
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}
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};
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namespace std {
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template <>
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struct hash<SurfaceKey> {
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size_t operator()(const SurfaceKey& k) const {
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return k.Hash();
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}
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};
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} // namespace std
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class CachedSurface final {
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public:
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CachedSurface(const SurfaceParams& params);
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const OGLTexture& Texture() const {
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return texture;
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}
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static constexpr unsigned int GetGLBytesPerPixel(SurfaceParams::PixelFormat format) {
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if (format == SurfaceParams::PixelFormat::Invalid)
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return 0;
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return SurfaceParams::GetFormatBpp(format) / CHAR_BIT;
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}
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const SurfaceParams& GetSurfaceParams() const {
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return params;
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}
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// Read/Write data in Switch memory to/from gl_buffer
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void LoadGLBuffer();
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void FlushGLBuffer();
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// Upload/Download data in gl_buffer in/to this surface's texture
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void UploadGLTexture(GLuint read_fb_handle, GLuint draw_fb_handle);
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void DownloadGLTexture(GLuint read_fb_handle, GLuint draw_fb_handle);
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private:
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OGLTexture texture;
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std::vector<u8> gl_buffer;
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SurfaceParams params;
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};
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class RasterizerCacheOpenGL final : NonCopyable {
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public:
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RasterizerCacheOpenGL();
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~RasterizerCacheOpenGL();
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/// Get a surface based on the texture configuration
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Surface GetTextureSurface(const Tegra::Texture::FullTextureInfo& config);
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/// Get the color and depth surfaces based on the framebuffer configuration
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SurfaceSurfaceRect_Tuple GetFramebufferSurfaces(bool using_color_fb, bool using_depth_fb,
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const MathUtil::Rectangle<s32>& viewport);
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/// Marks the specified surface as "dirty", in that it is out of sync with Switch memory
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void MarkSurfaceAsDirty(const Surface& surface);
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/// Tries to find a framebuffer GPU address based on the provided CPU address
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Surface TryFindFramebufferSurface(VAddr cpu_addr) const;
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/// Write any cached resources overlapping the region back to memory (if dirty)
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void FlushRegion(Tegra::GPUVAddr addr, size_t size);
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/// Mark the specified region as being invalidated
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void InvalidateRegion(Tegra::GPUVAddr addr, size_t size);
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private:
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void LoadSurface(const Surface& surface);
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Surface GetSurface(const SurfaceParams& params);
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/// Register surface into the cache
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void RegisterSurface(const Surface& surface);
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/// Remove surface from the cache
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void UnregisterSurface(const Surface& surface);
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/// Increase/decrease the number of surface in pages touching the specified region
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void UpdatePagesCachedCount(Tegra::GPUVAddr addr, u64 size, int delta);
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std::unordered_map<SurfaceKey, Surface> surface_cache;
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PageMap cached_pages;
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OGLFramebuffer read_framebuffer;
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OGLFramebuffer draw_framebuffer;
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};
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