forked from suyu/suyu
105 lines
3.2 KiB
C++
105 lines
3.2 KiB
C++
// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "shader_recompiler/backend/spirv/emit_spirv.h"
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namespace Shader::Backend::SPIRV {
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Id EmitCompositeConstructU32x2(EmitContext& ctx, Id e1, Id e2) {
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return ctx.OpCompositeConstruct(ctx.U32[2], e1, e2);
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}
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Id EmitCompositeConstructU32x3(EmitContext& ctx, Id e1, Id e2, Id e3) {
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return ctx.OpCompositeConstruct(ctx.U32[3], e1, e2, e3);
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}
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Id EmitCompositeConstructU32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4) {
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return ctx.OpCompositeConstruct(ctx.U32[4], e1, e2, e3, e4);
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}
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Id EmitCompositeExtractU32x2(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
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}
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Id EmitCompositeExtractU32x3(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
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}
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Id EmitCompositeExtractU32x4(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
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}
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void EmitCompositeConstructF16x2(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitCompositeConstructF16x3(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitCompositeConstructF16x4(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitCompositeExtractF16x2(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
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}
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Id EmitCompositeExtractF16x3(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
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}
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Id EmitCompositeExtractF16x4(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
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}
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void EmitCompositeConstructF32x2(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitCompositeConstructF32x3(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitCompositeConstructF32x4(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitCompositeExtractF32x2(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
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}
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Id EmitCompositeExtractF32x3(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
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}
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Id EmitCompositeExtractF32x4(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
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}
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void EmitCompositeConstructF64x2(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitCompositeConstructF64x3(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitCompositeConstructF64x4(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitCompositeExtractF64x2(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitCompositeExtractF64x3(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitCompositeExtractF64x4(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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} // namespace Shader::Backend::SPIRV
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